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    APPARATUS AND METHOD FOR FAST BOOTING BASED ON VIRTUALIZATION TECHNIQUE
    1.
    发明申请
    APPARATUS AND METHOD FOR FAST BOOTING BASED ON VIRTUALIZATION TECHNIQUE 审中-公开
    基于虚拟化技术的快速打包的装置和方法

    公开(公告)号：US20120144182A1

    公开(公告)日：2012-06-07

    申请号：US13312920

    申请日：2011-12-06

    申请人： Hyun Woo NAM ,  Su Hyun KIM

    发明人： Hyun Woo NAM ,  Su Hyun KIM

    IPC分类号： G06F9/00

    CPC分类号： G06F9/4401 ,  G06F9/4406 ,  G06F9/45558 ,  G06F2009/45575

    摘要： An apparatus for fast booting based on a virtualization technique includes: a hardware comprising a processor, a memory and a storage where a status information corresponding to an operating system (OS) is stored; and a virtual machine monitor (VMM) for interfacing between the OS and the hardware, wherein the VMM is operated by the processor and loads the status information on the memory. Herein, the status information may be pre-generated to include data in the memory in a state where the OS is completely booted.

    摘要翻译： 一种基于虚拟化技术的用于快速启动的装置，包括：包括处理器，存储器和存储器的硬件​​，其中存储与操作系统（OS）对应的状态信息; 以及用于在OS和硬件之间进行接口的虚拟机监视器（VMM），其中VMM由处理器操作并且将状态信息加载到存储器上。 这里，可以预先生成状态信息，以便在OS被完全引导的状态下将数据包括在存储器中。

    Multi-pointing method using magnetic field and device therefor
    2.
    发明授权
    Multi-pointing method using magnetic field and device therefor 有权
    使用磁场的多指点法及其装置

    公开(公告)号：US07982713B2

    公开(公告)日：2011-07-19

    申请号：US11773566

    申请日：2007-07-05

    申请人： Hyok-sung Choi ,  Su-hyun Kim ,  Seong-kook Shin

    发明人： Hyok-sung Choi ,  Su-hyun Kim ,  Seong-kook Shin

    IPC分类号： G06F3/033

    CPC分类号： G06F3/046 ,  G06F3/03544 ,  G06F3/03545

    摘要： A multi-pointing method using a magnetic field is provided. When one or more pointing devices that generate magnetic fields move or rotate, locations and directions of rotation of the one or more pointing devices are sensed based on patterns of magnetic fields generated by the one or more pointing devices and changes in the patterns.

    摘要翻译： 提供了使用磁场的多指向方法。 当产生磁场的一个或多个指示装置移动或旋转时，基于由一个或多个指示装置产生的磁场的图案和模式的改变来感测一个或多个指示装置的位置和旋转方向。

    Duty cycle correction (DCC) circuit and delayed locked loop (DLL) circuit using the same
    4.
    发明申请
    Duty cycle correction (DCC) circuit and delayed locked loop (DLL) circuit using the same 有权
    使用相同的占空比校正（DCC）电路和延迟锁定环（DLL）电路

    公开(公告)号：US20080042705A1

    公开(公告)日：2008-02-21

    申请号：US11648314

    申请日：2006-12-29

    申请人： Su Hyun Kim ,  Min Young Yoo

    发明人： Su Hyun Kim ,  Min Young Yoo

    IPC分类号： H03L7/06

    CPC分类号： H03L7/07 ,  H03L7/0812 ,  H03L7/095

    摘要： A duty cycle correction (DCC) circuit and a delayed locked loop (DLL) circuit using the same are disclosed. The DCC circuit is operated by an enable signal which is enabled when the DLL is locked. The duty cycle correction (DCC) circuit includes a clock input unit and a duty cycle mixing unit. The clock input unit receives the enable signal and first and second clock input signals having opposite phases, generates an inverting signal of the first clock input signal, and when the enable signal is enabled, generates first and second internal clock signals, based on the first and second clock input signals and the inverting signal. The duty cycle mixing unit mixes a phase of the first internal clock signal with a phase of the second internal clock signal.

    摘要翻译： 公开了一种占空比校正（DCC）电路和使用其的延迟锁定环（DLL）电路。 DCC电路由使能信号操作，当DLL被锁定时使能信号被使能。 占空比校正（DCC）电路包括时钟输入单元和占空比混合单元。 时钟输入单元接收使能信号和具有相反相位的第一和第二时钟输入信号，产生第一时钟输入信号的反相信号，并且当使能信号被使能时，基于第一时钟输入信号产生第一和第二内部时钟信号 和第二时钟输入信号和反相信号。 占空比混合单元将第一内部时钟信号的相位与第二内部时钟信号的相位相混合。

    Spin-coating apparatus for manufacturing semiconductor device and method of preventing transfer device from improperly positioning a wafer in the apparatus
    5.
    发明申请
    Spin-coating apparatus for manufacturing semiconductor device and method of preventing transfer device from improperly positioning a wafer in the apparatus 审中-公开
    用于制造半导体器件的旋涂装置和防止转移装置在装置中不正确地定位晶片的方法

    公开(公告)号：US20050276920A1

    公开(公告)日：2005-12-15

    申请号：US11123021

    申请日：2005-05-06

    申请人： Su-Hyun Kim

    发明人： Su-Hyun Kim

    IPC分类号： H01L21/027 ,  B05B13/04 ,  B05C13/02 ,  B05D3/12 ,  H01L21/00 ,  H01L21/66 ,  H01L21/68

    CPC分类号： H01L21/67259 ,  H01L21/681

    摘要： Spin-coating apparatus for use in manufacturing a semiconductor device or the like and a method of operation of the apparatus prevent substrates from being positioned incorrectly in a process module of the apparatus. The spin-coating apparatus includes an image sensor that captures an image of the wafer in the process module, and a control unit that receives image data from the image sensor. The method includes loading a substrate onto a process module using an arm of a transfer device, capturing an image of the substrate using the image sensor, and comparing image data generated by the image sensor with a standard image data stored to determine an actual position of the substrate. If the substrate is incorrectly positioned, the operation of the arm of the transfer device is adjusted to compensate.

    摘要翻译： 用于制造半导体器件等的旋涂装置以及该装置的操作方法防止在装置的处理模块中错误地定位基板。 旋转涂布装置包括捕获处理模块中的晶片的图像的图像传感器和从图像传感器接收图像数据的控制单元。 该方法包括使用传送装置的臂将衬底加载到处理模块上，使用图像传感器捕获衬底的图像，以及将由图像传感器生成的图像数据与存储的标准图像数据进行比较，以确定实际位置 底物。 如果基板定位不正确，则调整传送装置的臂的操作以进行补偿。

    Method and apparatus for effectively decoding Huffman code
    6.
    发明授权
    Method and apparatus for effectively decoding Huffman code 失效
    用于有效解码霍夫曼码的方法和装置

    公开(公告)号：US06919827B2

    公开(公告)日：2005-07-19

    申请号：US10968995

    申请日：2004-10-21

    申请人： Su-hyun Kim ,  Soon-back Cha

    发明人： Su-hyun Kim ,  Soon-back Cha

    IPC分类号： H03M7/40

    CPC分类号： H03M7/40

    摘要： A method for constructing and searching an improved Huffman table which is capable of improving the efficiency over an existing Huffman table in a decoding method and apparatus using a Huffman code. The method includes creating an improved Huffman table including an increment of a Huffman code length and the number of times Huffman code lengths repeats; generating a new bit string by extracting bits by the increment of the Huffman code length and adding the extracted bits to the end of a previous bit string; and reading values of corresponding codes by the number of times Huffman code length repeats from the improved Huffman table and determining whether values identical to a value of the new bit string are present. According to the present invention, unnecessary consumption of system resources can be reduced by decreasing the number of times search and comparison routines of Huffman codes are used.

    摘要翻译： 一种用于构造和搜索改进的霍夫曼表的方法，其能够在使用霍夫曼码的解码方法和装置中提高现有霍夫曼表上的效率。 该方法包括创建改进的霍夫曼表，其包括霍夫曼代码长度的增量和霍夫曼代码长度重复的次数; 通过以霍夫曼代码长度的增量提取比特来生成新的比特串，并将提取的比特相加到前一个比特串的末尾; 并且通过从改进的霍夫曼表重复霍夫曼码长度的次数来读取相应代码的值，并确定是否存在与新位串的值相同的值。 根据本发明，可以通过减少使用霍夫曼码的搜索和比较例程的次数来减少系统资源的不必要的消耗。

    Method for processing various numbers of ports in network processor
    9.
    发明授权
    Method for processing various numbers of ports in network processor 失效
    网络处理器中各种端口处理方法

    公开(公告)号：US07321595B2

    公开(公告)日：2008-01-22

    申请号：US10436104

    申请日：2003-05-13

    申请人： Su-Hyun Kim ,  Young-Seok Kim ,  Young-Il Kim ,  Jong-Sang Oh

    发明人： Su-Hyun Kim ,  Young-Seok Kim ,  Young-Il Kim ,  Jong-Sang Oh

    IPC分类号： H04L12/56

    CPC分类号： H04L49/30 ,  H04L49/25

    摘要： A method for processing various numbers of ports in a network processor. A method for processing various numbers of ports in a network processor comprises the steps of: a) receiving the number N of ports from a system controller; b) allocating N−1 number of registers for storing N−1 number of port management information in response to the number N of ports; c) processing a packet by sequentially accessing the N number of ports; and d) after processing a packet related to a predetermined port, storing management information related to the predetermined port in a register used for the next port, and storing the management information related to the predetermined port in a first register among the N−1 number of registers when a register for storing management information in a previous packet processing is the last (N−1)-th register among the N−1 number of registers.

    摘要翻译： 一种用于处理网络处理器中各种端口的方法。 一种用于在网络处理器中处理各种端口的方法，包括以下步骤：a）从系统控制器接收N个端口; b）分配N-1个用于存储N-1个端口管理信息的寄存器以响应端口数量N; c）通过顺序访问N个端口来处理分组; 以及d）在处理与预定端口相关的分组之后，将与所述预定端口相关的管理信息存储在用于下一个端口的寄存器中，并且将与所述预定端口相关的管理信息存储在第一寄存器中的N-1个数 用于存储先前分组处理中的管理信息的寄存器是N-1个寄存器中的最后（N-1）个寄存器。