公开(公告)号：US08415224B2

公开(公告)日：2013-04-09

申请号：US13184318

申请日：2011-07-15

申请人： Sung-Woo Hyun ,  Yu-Gyun Shin ,  Sun-Ghil Lee ,  Hong-Sik Yoon

发明人： Sung-Woo Hyun ,  Yu-Gyun Shin ,  Sun-Ghil Lee ,  Hong-Sik Yoon

IPC分类号： H01L21/331 ,  H01L21/76

CPC分类号： H01L27/088 ,  H01L21/823412 ,  H01L21/823418 ,  H01L29/66636 ,  H01L29/78 ,  H01L29/7848

摘要： A method of fabricating a semiconductor device and a semiconductor device are provided. The method includes method of fabricating a semiconductor device including providing a semiconductor substrate having a first semiconductor device region and a second semiconductor device region defined therein, forming a first gate structure in the first semiconductor device region, forming a second gate structure in the second semiconductor device region, forming a first trench adjacent to a first side of the first gate structure, forming a second trench adjacent to a first side of the second gate structure, and forming a first semiconductor pattern in the first trench and forming a second semiconductor pattern in the second trench, wherein the first and second trenches have different cross-sectional shapes from each other.

摘要翻译： 提供一种制造半导体器件和半导体器件的方法。 该方法包括制造半导体器件的方法，该半导体器件包括提供具有限定在其中的第一半导体器件区域和第二半导体器件区域的半导体衬底，在第一半导体器件区域中形成第一栅极结构，在第二半导体中形成第二栅极结构 形成与所述第一栅极结构的第一侧相邻的第一沟槽，形成邻近所述第二栅极结构的第一侧的第二沟槽，以及在所述第一沟槽中形成第一半导体图案并形成第二半导体图案 第二沟槽，其中第一和第二沟槽彼此具有不同的横截面形状。

公开(公告)号：US20120049285A1

公开(公告)日：2012-03-01

申请号：US13184318

申请日：2011-07-15

申请人： Sung-Woo Hyun ,  Yu-Gyun Shin ,  Sun-Ghil Lee ,  Hong-Sik Yoon

发明人： Sung-Woo Hyun ,  Yu-Gyun Shin ,  Sun-Ghil Lee ,  Hong-Sik Yoon

IPC分类号： H01L27/088 ,  H01L21/28

CPC分类号： H01L27/088 ,  H01L21/823412 ,  H01L21/823418 ,  H01L29/66636 ,  H01L29/78 ,  H01L29/7848

摘要： A method of fabricating a semiconductor device and a semiconductor device are provided. The method includes method of fabricating a semiconductor device including providing a semiconductor substrate having a first semiconductor device region and a second semiconductor device region defined therein, forming a first gate structure in the first semiconductor device region, forming a second gate structure in the second semiconductor device region, forming a first trench adjacent to a first side of the first gate structure, forming a second trench adjacent to a first side of the second gate structure, and forming a first semiconductor pattern in the first trench and forming a second semiconductor pattern in the second trench, wherein the first and second trenches have different cross-sectional shapes from each other.

摘要翻译： 提供一种制造半导体器件和半导体器件的方法。 该方法包括制造半导体器件的方法，该半导体器件包括提供具有限定在其中的第一半导体器件区域和第二半导体器件区域的半导体衬底，在第一半导体器件区域中形成第一栅极结构，在第二半导体中形成第二栅极结构 形成与所述第一栅极结构的第一侧相邻的第一沟槽，形成邻近所述第二栅极结构的第一侧的第二沟槽，以及在所述第一沟槽中形成第一半导体图案并形成第二半导体图案 第二沟槽，其中第一和第二沟槽彼此具有不同的横截面形状。

公开(公告)号：US08120045B2

公开(公告)日：2012-02-21

申请号：US12596888

申请日：2007-09-18

申请人： Young-Se Kwon ,  Kyoung-Min Kim ,  Sung-Woo Hyun ,  Bo-In Son

发明人： Young-Se Kwon ,  Kyoung-Min Kim ,  Sung-Woo Hyun ,  Bo-In Son

IPC分类号： H01L29/18

CPC分类号： H01L31/024 ,  H01L27/14618 ,  H01L31/0203 ,  H01L33/483 ,  H01L33/60 ,  H01L33/642 ,  H01L2224/48091 ,  H01L2924/00014

摘要： A metal-based photonic device package module that is capable of greatly improving heat releasing efficiency and implementing a thin package is provided. The metal-based photonic device package module includes a metal substrate that is formed the shape of a plate, a metal oxide layer that is formed on the metal substrate to have a mounting cavity, a photonic device that is mounted in the mounting cavity of the metal oxide layer, and a reflecting plane that is formed at an inner surface of the mounting cavity of the metal oxide layer.

摘要翻译： 提供了能够大大提高放热效率并实现薄包装的基于金属的光子器件封装模块。 金属基光子器件封装模块包括金属基板，其形成为板的形状，金属氧化物层形成在金属基板上以具有安装空腔，光子器件安装在安装空间中 金属氧化物层和形成在金属氧化物层的安装空腔的内表面的反射面。

公开(公告)号：US20110177671A1

公开(公告)日：2011-07-21

申请号：US12958858

申请日：2010-12-02

申请人： Sung-Woo HYUN ,  Byeong-Chan LEE ,  Sun-Ghil LEE ,  Yong-Hoon SON

发明人： Sung-Woo HYUN ,  Byeong-Chan LEE ,  Sun-Ghil LEE ,  Yong-Hoon SON

IPC分类号： H01L21/762

CPC分类号： H01L21/76224 ,  H01L27/1052 ,  H01L27/10876

摘要： Methods of forming a semiconductor cell array region, a method of forming a semiconductor device including the semiconductor cell array region, and a method of forming a semiconductor module including the semiconductor device are provided, the methods of forming the semiconductor cell array region include preparing a semiconductor plate. A semiconductor layer may be formed over the semiconductor plate. The semiconductor layer may be etched to form semiconductor pillars over the semiconductor plate.

摘要翻译： 提供形成半导体单元阵列区域的方法，形成包括半导体单元阵列区域的半导体器件的方法以及形成包括该半导体器件的半导体模块的方法，形成半导体单元阵列区域的方法包括： 半导体板。 半导体层可以形成在半导体板上。 可以蚀刻半导体层以在半导体板上形成半导体柱。

公开(公告)号：US20100133557A1

公开(公告)日：2010-06-03

申请号：US12596888

申请日：2007-09-18

申请人： Young-Se Kwon ,  Kyoung-Min Kim ,  Sung-Woo Hyun ,  Bo-In Son

发明人： Young-Se Kwon ,  Kyoung-Min Kim ,  Sung-Woo Hyun ,  Bo-In Son

IPC分类号： H01L33/00 ,  H01L21/50

CPC分类号： H01L31/024 ,  H01L27/14618 ,  H01L31/0203 ,  H01L33/483 ,  H01L33/60 ,  H01L33/642 ,  H01L2224/48091 ,  H01L2924/00014

摘要： A metal-based photonic device package module that is capable of greatly improving heat releasing efficiency and implementing a thin package is provided. The metal-based photonic device package module includes a metal substrate that is formed the shape of a plate, a metal oxide layer that is formed on the metal substrate to have a mounting cavity, a photonic device that is mounted in the mounting cavity of the metal oxide layer, and a reflecting plane that is formed at an inner surface of the mounting cavity of the metal oxide layer.

摘要翻译： 提供了能够大大提高放热效率并实现薄包装的基于金属的光子器件封装模块。 金属基光子器件封装模块包括金属基板，其形成为板的形状，金属氧化物层形成在金属基板上以具有安装空腔，光子器件安装在安装空间中 金属氧化物层和形成在金属氧化物层的安装空腔的内表面的反射面。

公开(公告)号：US08236673B2

公开(公告)日：2012-08-07

申请号：US13024924

申请日：2011-02-10

申请人： Yong-hoon Son ,  Jin-ha Jeong ,  Jung-ho Kim ,  Vladimir Urazaev ,  Jong-hyuk Kang ,  Sung-woo Hyun

发明人： Yong-hoon Son ,  Jin-ha Jeong ,  Jung-ho Kim ,  Vladimir Urazaev ,  Jong-hyuk Kang ,  Sung-woo Hyun

IPC分类号： H01L21/20

CPC分类号： H01L21/20

摘要： A method of fabricating a vertical NAND semiconductor device can include changing a phase of a first preliminary semiconductor layer in an opening from solid to liquid to form a first single crystalline semiconductor layer in the opening and then forming a second preliminary semiconductor layer on the first single crystalline semiconductor layer. The phase of the second preliminary semiconductor layer is changed from solid to liquid to form a second single crystalline semiconductor layer that combines with the first single crystalline semiconductor layers to form a single crystalline semiconductor layer in the opening.

摘要翻译： 制造垂直NAND半导体器件的方法可以包括将开口中的第一初级半导体层的相位从固体改变为在开口中形成第一单晶半导体层，然后在第一单个晶体管上形成第二初步半导体层 晶体半导体层。 第二初步半导体层的相位从固体变为液态，形成与第一单晶半导体层结合以在开口中形成单晶半导体层的第二单晶半导体层。

公开(公告)号：US20110217828A1

公开(公告)日：2011-09-08

申请号：US13024924

申请日：2011-02-10

申请人： Yong-hoon Son ,  Jin-ha Jeong ,  Jung-ho Kim ,  Vladimir Urazaev ,  Jong-hyuk Kang ,  Sung-woo Hyun

发明人： Yong-hoon Son ,  Jin-ha Jeong ,  Jung-ho Kim ,  Vladimir Urazaev ,  Jong-hyuk Kang ,  Sung-woo Hyun

IPC分类号： H01L21/20

CPC分类号： H01L21/20

摘要： A method of fabricating a vertical NAND semiconductor device can include changing a phase of a first preliminary semiconductor layer in an opening from solid to liquid to form a first single crystalline semiconductor layer in the opening and then forming a second preliminary semiconductor layer on the first single crystalline semiconductor layer. The phase of the second preliminary semiconductor layer is changed from solid to liquid to form a second single crystalline semiconductor layer that combines with the first single crystalline semiconductor layers to form a single crystalline semiconductor layer in the opening.

摘要翻译： 制造垂直NAND半导体器件的方法可以包括将开口中的第一初级半导体层的相位从固体改变为在开口中形成第一单晶半导体层，然后在第一单个晶体管上形成第二初步半导体层 晶体半导体层。 第二初步半导体层的相位从固体变为液态，形成与第一单晶半导体层结合以在开口中形成单晶半导体层的第二单晶半导体层。