公开(公告)号：US20100207650A1

公开(公告)日：2010-08-19

申请号：US12370609

申请日：2009-02-13

申请人： TADAHIKO BABA ,  HIROSHI KUROSAKI

发明人： TADAHIKO BABA ,  HIROSHI KUROSAKI

IPC分类号： G01R31/02 ,  G01R31/14

CPC分类号： G01R31/31937 ,  G01R31/31922

摘要： Provided is a test apparatus for testing a device under test, comprising a multi-strobe generating section that generates, for each prescribed test cycle, a multi-strobe that includes a plurality of strobes arranged at prescribed time intervals; a data detecting section that detects a logic value of a response signal output by the device under test, according to each strobe; and a data width detecting section that detects a data width indicating a period during which the logic value of the response signal matches a prescribed expected value, based on each change point of a logic value output by the data detecting section.

摘要翻译： 提供了一种用于测试被测器件的测试装置，包括：多选通产生部分，用于在每个规定的测试周期产生包括以预定时间间隔布置的多个选通的多次选通; 数据检测部分，根据每个选通信号，检测被被测设备输出的响应信号的逻辑值; 以及数据宽度检测部，其基于由数据检测部输出的逻辑值的每个变化点来检测表示响应信号的逻辑值与规定的期望值相匹配的期间的数据宽度。

公开(公告)号：US07783452B2

公开(公告)日：2010-08-24

申请号：US11941087

申请日：2007-11-16

申请人： Tadahiko Baba ,  Masatoshi Ohashi

发明人： Tadahiko Baba ,  Masatoshi Ohashi

IPC分类号： G06F17/18

CPC分类号： G01R31/31937 ,  G01R31/31708 ,  G01R31/31922

摘要： A signal measuring apparatus that measures a first input signal and a second input signal is provided, including a first measuring section that measures the first input signal at a plurality of strobe timings arranged in each cycle of a measurement cycle, a second measuring section that measures the second input signal at a plurality of strobe timings arranged in each cycle of a measurement cycle, a phase difference calculating section that calculates phase differences between the first input signal and the second input signal in each measurement cycle based on measurement results from the first measuring section and the second measuring section, and a distribution generating section that generates distribution information of the phase differences calculated in each measurement cycle by the phase difference calculating section.

摘要翻译： 提供了一种测量第一输入信号和第二输入信号的信号测量装置，包括：测量在测量周期的每个周期中布置的多个选通定时的第一输入信号的第一测量部分， 在测量周期的每个周期中布置的多个选通定时处的第二输入信号，基于来自第一测量的测量结果计算每个测量周期中的第一输入信号和第二输入信号之间的相位差的相位差计算部 以及分配生成部，其通过相位差计算部生成在各测量周期中计算出的相位差的分布信息。

公开(公告)号：US5646948A

公开(公告)日：1997-07-08

申请号：US297924

申请日：1994-08-31

申请人： Shinichi Kobayashi ,  Toshimi Ohsawa ,  Tadashi Okazaki ,  Kazumi Kita ,  Junichi Kanai ,  Tadahiko Baba

发明人： Shinichi Kobayashi ,  Toshimi Ohsawa ,  Tadashi Okazaki ,  Kazumi Kita ,  Junichi Kanai ,  Tadahiko Baba

IPC分类号： G01R31/3193 ,  G11C29/56 ,  G01R31/28 ,  G06F7/38 ,  G06F11/00 ,  G11C7/00

CPC分类号： G01R31/31935 ,  G11C29/56

摘要： A test data pattern, an address pattern, and a control signal are supplied from a pattern generator to a test memory. Data read from the test memory is compared with expected data by an XOR gate. When they match, a compared result that represents pass is output. When they mismatch, a compared result that represents fail is output. A match signal WC detected by the XOR gate is held in a register. The register outputs an inhibition signal to an inhibition gate of the test memory. Thus, a write enable signal WE is inhibited from being supplied to the test memory. In addition, the inhibition signal is supplied to a compared result inhibition gate. The compared result inhibition gate causes the compared result to be passed and prevents the test memory from being excessively written.

摘要翻译： 测试数据模式，地址模式和控制信号从模式发生器提供给测试存储器。 从测试存储器读取的数据通过XOR门与预期数据进行比较。 当它们匹配时，输出表示通过的比较结果。 当它们不匹配时，输出表示失败的比较结果。 由异或门检测到的匹配信号WC被保存在寄存器中。 寄存器输出禁止信号到测试存储器的禁止门。 因此，禁止写使能信号WE被提供给测试存储器。 此外，禁止信号被提供给比较结果禁止门。 比较结果禁止门导致比较结果通过，并防止测试存储器被过度写入。

公开(公告)号：US20090216488A1

公开(公告)日：2009-08-27

申请号：US11941087

申请日：2007-11-16

申请人： Tadahiko Baba ,  Masatoshi Ohashi

发明人： Tadahiko Baba ,  Masatoshi Ohashi

IPC分类号： G06F17/18

CPC分类号： G01R31/31937 ,  G01R31/31708 ,  G01R31/31922

摘要： A signal measuring apparatus that measures a first input signal and a second input signal is provided, including a first measuring section that measures the first input signal at a plurality of strobe timings arranged in each cycle of a measurement cycle, a second measuring section that measures the second input signal at a plurality of strobe timings arranged in each cycle of a measurement cycle, a phase difference calculating section that calculates phase differences between the first input signal and the second input signal in each measurement cycle based on measurement results from the first measuring section and the second measuring section, and a distribution generating section that generates distribution information of the phase differences calculated in each measurement cycle by the phase difference calculating section.

摘要翻译： 提供了一种测量第一输入信号和第二输入信号的信号测量装置，包括：测量在测量周期的每个周期中布置的多个选通定时的第一输入信号的第一测量部分， 在测量周期的每个周期中布置的多个选通定时处的第二输入信号，基于来自第一测量的测量结果计算每个测量周期中的第一输入信号和第二输入信号之间的相位差的相位差计算部 以及分配生成部，其通过相位差计算部生成在各测量周期中计算出的相位差的分布信息。

公开(公告)号：US20080228417A1

公开(公告)日：2008-09-18

申请号：US11864939

申请日：2007-09-29

申请人： TADAHIKO BABA ,  Hirokatsu Niijima

发明人： TADAHIKO BABA ,  Hirokatsu Niijima

IPC分类号： G01R29/26 ,  G06F19/00

CPC分类号： G01R31/31709 ,  G01R29/26 ,  H03K5/1534

摘要： A changing point detection circuit is provided that detects timing of changing points at which a logic value of a signal under measurement changes and includes a multi-strobe circuit generating a logic value data string obtained by detecting a logic value of the signal under measurement according to a plurality of strobes, each strobe having a different phase; a changing point detecting section detecting in which strobe the logic value changes based on the logic value data string; an edge designation storage section storing in advance information concerning whether an edge-type of the changing point to be detected is a rising edge or a falling edge of the signal under measurement; a selecting section selecting the changing point corresponding to the edge-type stored by the edge designation storage section from among the changing points detected by the changing point detecting section; and a strobe place storage section storing information concerning which strobe the changing point selected by the selecting section corresponds to.

摘要翻译： 提供了一种改变点检测电路，其检测测量信号的逻辑值改变的点的定时，并且包括多选通电路，其产生通过根据测量信号检测被测信号的逻辑值而获得的逻辑值数据串 多个选通，每个选通具有不同的相位; 变更点检测部，根据所述逻辑值数据串检测所述逻辑值在哪个选通脉冲中变化的变化点; 边缘指定存储部分，预先存储关于被检测的切换点的边缘类型是被测信号的上升沿还是下降沿的信息; 选择部分，从由变化点检测部分检测的变化点中选择与由边缘指定存储部分存储的边缘类型对应的变化点; 以及选通存储部，其存储与所述选择部选择的所述变化点对应的选通的信息。

公开(公告)号：US07965093B2

公开(公告)日：2011-06-21

申请号：US12370609

申请日：2009-02-13

申请人： Tadahiko Baba ,  Hiroshi Kurosaki

发明人： Tadahiko Baba ,  Hiroshi Kurosaki

IPC分类号： G01R31/02 ,  G01R31/14

CPC分类号： G01R31/31937 ,  G01R31/31922

摘要： Provided is a test apparatus for testing a device under test, including a multi-strobe generating section that generates, for each prescribed test cycle, a multi-strobe that includes a plurality of strobes arranged at prescribed time intervals, a data detecting section that detects a logic value of a response signal output by the device under test, according to each strobe, and a data width detecting section that detects a data width indicating a period during which the logic value of the response signal matches a prescribed expected value, based on each change point of a logic value output by the data detecting section.

摘要翻译： 提供了一种用于测试被测设备的测试装置，包括：多选通产生部分，用于针对每个规定的测试周期产生包括以预定时间间隔布置的多个选通的多选通信号;数据检测部分， 根据每个选通脉冲，由被测器件输出的响应信号的逻辑值，以及数据宽度检测部分，其基于以下步骤检测响应信号的逻辑值与规定的期望值相匹配的期间的数据宽度 由数据检测部分输出的逻辑值的每个变化点。

公开(公告)号：US06885956B2

公开(公告)日：2005-04-26

申请号：US10477779

申请日：2002-05-24

申请人： Tadahiko Baba

发明人： Tadahiko Baba

IPC分类号： G11C29/56 ,  G01R31/28

CPC分类号： G11C29/56004 ,  G11C29/56

摘要： There is disclosed a semiconductor test apparatus enabling writing into an information write space of a block including a failure cell into which block writing is inhibited partially or entirely by the bad block mask function and the fail loop back function. A pattern generation block outputs to an output controller a release signal (S4) for releasing the write inhibit instruction defined by an inhibit signal (S3) and a mask signal (SI). When the output controller receives the release signal (S4), the output controller outputs a write enable signal (WE) to an MUT (4).

摘要翻译： 公开了一种半导体测试装置，其能够写入包括故障单元的块的信息写入空间，通过坏块掩码功能和故障回路功能部分地或全部地禁止块写入。 模式生成块向输出控制器输出用于释放由禁止信号（S 3）和掩码信号（SI）定义的写禁止指令的释放信号（S 4）。 当输出控制器接收到释放信号（S 4）时，输出控制器向MUT（4）输出写使能信号（WE）。