公开(公告)号：US07586056B2

公开(公告)日：2009-09-08

申请号：US11853512

申请日：2007-09-11

申请人： Tomohiro Nakayama ,  Norio Suzuki

发明人： Tomohiro Nakayama ,  Norio Suzuki

IPC分类号： H01H1/10

CPC分类号： H01H13/705 ,  B29C45/0055 ,  B29C45/382 ,  B29C2045/0086 ,  B29L2031/466 ,  H01H13/88 ,  H01H2219/064 ,  H01H2221/07 ,  H01H2229/036 ,  H01H2229/044 ,  Y10T29/49105 ,  Y10T29/53248

摘要： To separate resin molded parts that are used for a push button switch member with less light leakage from the side faces and less trouble in key operation, easily, a resin molded body comprises one or more resin molded parts for a push button switch member, a frame surrounding the outside of the resin molded parts, one or more gates connecting a plurality of the resin molded parts each other or the resin molded part to the frame and one or more runners crossing the longitudinal direction of the gates, wherein the gates are connected at the back faces of the resin molded parts not to be coated with light shielding paint, and wherein the runners are connected to the gates on the same surfaces as the resin molded parts are connected to and are connecting the opposing sides of the frame.

摘要翻译： 为了分离用于按钮开关部件的树脂模制部件，具有较少的侧面漏光和较少的按键操作麻烦，树脂成型体容易地包括用于按钮开关部件的一个或多个树脂模制部件， 围绕树脂模制部件的外侧的框架，将多个树脂模制部件彼此连接的一个或多个浇口或与框架连接的树脂模制部件以及与浇口的纵向方向交叉的一个或多个浇道，其中，浇口连接 在未被遮光涂料涂布的树脂成形部件的背面，在与树脂成形部连接并连接框架的相对侧的同一表面上连接有浇口。

公开(公告)号：US06675160B2

公开(公告)日：2004-01-06

申请号：US10167435

申请日：2002-06-13

申请人： Norihiro Hara ,  Nobuo Kawamura ,  Tomohiro Nakayama ,  Kiyomi Hirohata

发明人： Norihiro Hara ,  Nobuo Kawamura ,  Tomohiro Nakayama ,  Kiyomi Hirohata

IPC分类号： G06F1730

CPC分类号： G06F17/30463 ,  G06F17/30312 ,  G06F17/30483 ,  G06F17/30492 ,  Y10S707/99932 ,  Y10S707/99933 ,  Y10S707/99937

摘要： A database processing system for analyzing a query issued to a database to generate a corresponding execution procedure for performing database processing in accordance therewith. A plurality of columns for storing data each constituted by a set of instances and conditions concerning the instances constituting the plurality of columns are entered. A query is inputted which contains a predicate for evaluating whether a set of instances which meet the designated conditions and which can be identified with the same subscript exists among the sets of instances stored in the plurality of columns. In response to the query, a decision is made as to whether or not an index has been generated for one or plural columns specified in the query predicate. When the index is generated, the index is accessed to acquire an identifier of table data which is “true” for a predicate. Unless the index is generated, a decision is then made as to whether or not column data acquired by accessing the database meet the conditions specified in the predicate contained in the query.

摘要翻译： 一种数据库处理系统，用于分析发给数据库的查询，以生成相应的执行过程，用于执行数据库处理。 输入用于存储数据的多个列，每个列由关于构成多个列的实例的一组实例和条件构成。 输入查询，该查询包含用于评估在多个列中存储的实例组中是否存在满足指定条件并且可以被标识具有相同下标的一组实例的谓词。 响应于该查询，作出关于是否已经在查询谓词中指定的一个或多个列生成了索引的决定。 当生成索引时，访问索引以获取对于谓词为“true”的表数据的标识符。 除非生成索引，否则就决定通过访问数据库获取的列数据是否满足查询中包含的谓词中指定的条件。

公开(公告)号：US06427145B1

公开(公告)日：2002-07-30

申请号：US09516778

申请日：2000-03-01

申请人： Norihiro Hara ,  Nobuo Kawamura ,  Tomohiro Nakayama ,  Kiyomi Hirohata

发明人： Norihiro Hara ,  Nobuo Kawamura ,  Tomohiro Nakayama ,  Kiyomi Hirohata

IPC分类号： G06F1730

CPC分类号： G06F17/30463 ,  G06F17/30312 ,  G06F17/30483 ,  G06F17/30492 ,  Y10S707/99932 ,  Y10S707/99933 ,  Y10S707/99937

摘要： A database processing system for analyzing a query issued to a database to generate a corresponding execution procedure for performing database processing in accordance therewith. A plurality of columns for storing data each constituted by a set of instances and conditions concerning the instances constituting the plurality of columns are entered. A query is inputted which contains a predicate for evaluating whether a set of instances which meet the designated conditions and which can be identified with the same subscript exists among the sets of instances stored in the plurality of columns. In response to the query, a decision is made as to whether or not an index has been generated for one or plural columns specified in the query predicate. When the index is generated, the index is accessed to acquire an identifier of table data which is “true” for a predicate. Unless the index is generated, a decision is then made as to whether or not column data acquired by accessing the database meet the conditions specified in the predicate contained in the query.

摘要翻译： 一种数据库处理系统，用于分析发给数据库的查询，以生成相应的执行过程，用于执行数据库处理。 输入用于存储数据的多个列，每个列由关于构成多个列的实例的一组实例和条件构成。 输入查询，该查询包含用于评估在多个列中存储的实例组中是否存在满足指定条件并且可以被标识具有相同下标的一组实例的谓词。 响应于该查询，作出关于是否已经在查询谓词中指定的一个或多个列生成了索引的决定。 当生成索引时，访问索引以获取对于谓词为“true”的表数据的标识符。 除非生成索引，否则决定是否通过访问数据库获取的列数据满足查询中包含的谓词中指定的条件。

公开(公告)号：US06262924B1

公开(公告)日：2001-07-17

申请号：US09452168

申请日：1999-12-01

申请人： Yutaka Fukutani ,  Tomohiro Nakayama ,  Seizi Hirayama ,  Waichiro Fujieda ,  Arayama Youji ,  Atsushi Fujii ,  Yoshitaka Takahashi ,  Masanori Nagasawa ,  Masakazu Kimura ,  Tutomu Taniguti ,  Hiroyuki Fujimoto

发明人： Yutaka Fukutani ,  Tomohiro Nakayama ,  Seizi Hirayama ,  Waichiro Fujieda ,  Arayama Youji ,  Atsushi Fujii ,  Yoshitaka Takahashi ,  Masanori Nagasawa ,  Masakazu Kimura ,  Tutomu Taniguti ,  Hiroyuki Fujimoto

IPC分类号： G11C700

CPC分类号： G11C29/822 ,  G11C8/18 ,  G11C16/0441 ,  G11C16/10 ,  G11C17/12 ,  G11C29/80 ,  G11C29/83 ,  G11C29/846

摘要： A semiconductor memory device is provided with terminals for receiving a chip enable signal and an address signal, an internal circuit, and an internal control signal generating circuit for generating a predetermined internal control signal which makes an output timing of the semiconductor memory device same regardless of a level of the address signal when the chip enable signal undergoes a transition from an inactive level to an active level. The internal circuit is deactivated in response to the inactive level of the chip enable signal and is activated in response to the active level of the chip enable signal.

摘要翻译： 半导体存储器件设置有用于接收芯片使能信号和地址信号的端子，内部电路和内部控制信号产生电路，用于产生预定的内部控制信号，其使半导体存储器件的输出定时相同，而不管 当芯片使能信号经历从非活动电平转换到有效电平时的地址信号的电平。 内部电路响应于芯片使能信号的无效电平被去激活，并且响应于芯片使能信号的有效电平被激活。

公开(公告)号：US5831933A

公开(公告)日：1998-11-03

申请号：US847596

申请日：1997-04-25

申请人： Yutaka Fukutani ,  Tomohiro Nakayama ,  Seizi Hirayama ,  Waichiro Fujieda ,  Arayama Youji ,  Atsushi Fujii ,  Yoshitaka Takahashi ,  Masanori Nagasawa ,  Masakazu Kimura ,  Tutomu Taniguti ,  Hiroyuki Fujimoto

发明人： Yutaka Fukutani ,  Tomohiro Nakayama ,  Seizi Hirayama ,  Waichiro Fujieda ,  Arayama Youji ,  Atsushi Fujii ,  Yoshitaka Takahashi ,  Masanori Nagasawa ,  Masakazu Kimura ,  Tutomu Taniguti ,  Hiroyuki Fujimoto

IPC分类号： G11C8/18 ,  G11C16/04 ,  G11C17/12 ,  G11C29/00 ,  G11C8/00

CPC分类号： G11C29/80 ,  G11C16/0441 ,  G11C17/12 ,  G11C29/822 ,  G11C29/83 ,  G11C29/846 ,  G11C8/18

摘要： A semiconductor memory device is provided with terminals for receiving a chip enable signal and an address signal, an internal circuit, and an internal control signal generating circuit for generating a predetermined internal control signal which makes an output timing of the semiconductor memory device same regardless of a level of the address signal when the chip enable signal undergoes a transition from an inactive level to an active level. The internal circuit is deactivated in response to the inactive level of the chip enable signal and is activated in response to the active level of the chip enable signal.

公开(公告)号：US5781627A

公开(公告)日：1998-07-14

申请号：US509641

申请日：1995-07-31

申请人： Nobuo Ikuta ,  Kouji Ueno ,  Kouji Shishido ,  Yutaka Fukutani ,  Youji Arayama ,  Tomohiro Nakayama ,  Takanori Shiga ,  Masakazu Kimura ,  Hiroyuki Fujimoto ,  Yoshiyuki Fujita

发明人： Nobuo Ikuta ,  Kouji Ueno ,  Kouji Shishido ,  Yutaka Fukutani ,  Youji Arayama ,  Tomohiro Nakayama ,  Takanori Shiga ,  Masakazu Kimura ,  Hiroyuki Fujimoto ,  Yoshiyuki Fujita

IPC分类号： G06F12/14 ,  G11C8/20 ,  G11B23/28

CPC分类号： G11C8/20 ,  G06F12/1408

摘要： A semiconductor integrated circuit device with a copy-preventive function comprises a memory for storing data to be used by users, an input unit for performing various logical operations on at least one input information fed externally and accessing the memory, an output unit for performing various logical operations on the data at the time of supplying the data from the memory, a judging unit for comparing at least one of the state of the input information, the logical state of the input unit, the logical state of the output unit, and the state of data provided by the output unit with specific judgment information and indicating the result of comparison, and a control unit that when the result indicated by the judging unit reveals that the at least one of the states is consistent with a specific state, acts at least on the output unit so as to prevent data stored in the memory from being supplied normally. Due to this configuration, a copy-preventive function can be reformed frequently from both the aspects of software and hardware. Consequently, illegal copying of data can be substantially disabled.

摘要翻译： 具有防复制功能的半导体集成电路器件包括用于存储要由用户使用的数据的存储器，用于对外部馈送的至少一个输入信息执行各种逻辑运算并访问存储器的输入单元，用于执行各种 在从存储器提供数据时对数据进行逻辑运算，判断单元，用于比较输入信息的状态，输入单元的逻辑状态，输出单元的逻辑状态和输出单元的逻辑状态中的至少一个， 由输出单元提供的具有特定判断信息并指示比较结果的数据状态;以及控制单元，当判断单元指示的结果显示该至少一个状态与特定状态一致时， 至少在输出单元上，以防止存储在存储器中的数据被正常地提供。 由于这种配置，可以从软件和硬件的方面频繁地改变防复制功能。 因此，可以基本上禁用非法复制数据。

公开(公告)号：US5600599A

公开(公告)日：1997-02-04

申请号：US359462

申请日：1994-12-20

申请人： Tomohiro Nakayama ,  Yutaka Fukutani ,  Takanori Shiga ,  Masakazu Kimura

发明人： Tomohiro Nakayama ,  Yutaka Fukutani ,  Takanori Shiga ,  Masakazu Kimura

IPC分类号： G11C11/417 ,  G11C7/10 ,  G11C11/407 ,  G11C11/409 ,  G11C11/413 ,  H03K19/003 ,  G11C7/00

CPC分类号： G11C7/106 ,  G11C7/1051

摘要： An object of the present invention is to improve the output speed of a data signal output circuit having a latch circuit when the supply voltage is low. The data signal output circuit according to the present invention includes a latch circuit; an output circuit; a latch control circuit; an output control circuit; and a supply voltage decrease detection circuit. The latch circuit latches and holds a data signal according to a latch signal output from the latch control circuit. By setting the latch signal to one of two logical states, the latch circuit changes to a through state directly outputting an input data signal. The output circuit changes between a state for outputting a data signal from the latch circuit and a high-impedance state according to an output control signal output from the output control circuit. The supply voltage decrease detection circuit detects whether or not the supply voltage is less than a pre-determined value. When the supply voltage decrease detection circuit detects that the supply voltage is less than the pre-determined value the latch control circuit outputs a latch signal to set the latch circuit to the through state and the output control circuit outputs an output control signal to set the output circuit to output the data signal from the latch circuit.

摘要翻译： 本发明的一个目的是提供一种当电源电压低时具有锁存电路的数据信号输出电路的输出速度。 根据本发明的数据信号输出电路包括一个锁存电路; 输出电路; 锁存控制电路; 输出控制电路; 和电源电压降低检测电路。 锁存电路根据从锁存控制电路输出的锁存信号来锁存和保持数据信号。 通过将锁存信号设置为两个逻辑状态之一，锁存电路变为直接输出输入数据信号的直通状态。 输出电路根据从输出控制电路输出的输出控制信号，在从锁存电路输出数据信号的状态和高阻抗状态之间变化。 电源电压降低检测电路检测电源电压是否小于预定值。 当电源电压降低检测电路检测到电源电压小于预定值时，锁存器控制电路输出锁存信号以将锁存电路设置为通过状态，并且输出控制电路输出输出控制信号以设置 输出电路，从锁存电路输出数据信号。

公开(公告)号：US07985368B2

公开(公告)日：2011-07-26

申请号：US12499222

申请日：2009-07-08

申请人： Tomohiro Nakayama ,  Norio Suzuki

发明人： Tomohiro Nakayama ,  Norio Suzuki

IPC分类号： B29C43/22 ,  H01H13/14 ,  H01H11/00

CPC分类号： H01H13/705 ,  B29C45/0055 ,  B29C45/382 ,  B29C2045/0086 ,  B29L2031/466 ,  H01H13/88 ,  H01H2219/064 ,  H01H2221/07 ,  H01H2229/036 ,  H01H2229/044 ,  Y10T29/49105 ,  Y10T29/53248

摘要： To separate resin molded parts that are used for a push button switch member with less light leakage from the side faces and less trouble in key operation, easily, a resin molded body comprises one or more resin molded parts for a push button switch member, a frame surrounding the outside of the resin molded parts, one or more gates connecting a plurality of the resin molded parts each other or the resin molded part to the frame and one or more runners crossing the longitudinal direction of the gates, wherein the gates are connected at the back faces of the resin molded parts not to be coated with light shielding paint, and wherein the runners are connected to the gates on the same surfaces as the resin molded parts are connected to and are connecting the opposing sides of the frame.

摘要翻译： 为了分离用于按钮开关部件的树脂模制部件，具有较少的侧面漏光和较少的按键操作麻烦，树脂成型体容易地包括用于按钮开关部件的一个或多个树脂模制部件， 围绕树脂模制部件的外侧的框架，将多个树脂模制部件彼此连接的一个或多个浇口或与框架连接的树脂模制部件以及与浇口的纵向方向交叉的一个或多个浇道，其中，浇口连接 在未被遮光涂料涂布的树脂成形部件的背面，在与树脂成形部连接并连接框架的相对侧的同一表面上连接有浇口。

公开(公告)号：US07955069B2

公开(公告)日：2011-06-07

申请号：US12499214

申请日：2009-07-08

申请人： Tomohiro Nakayama ,  Norio Suzuki

发明人： Tomohiro Nakayama ,  Norio Suzuki

IPC分类号： B29C45/38

CPC分类号： H01H13/705 ,  B29C45/0055 ,  B29C45/382 ,  B29C2045/0086 ,  B29L2031/466 ,  H01H13/88 ,  H01H2219/064 ,  H01H2221/07 ,  H01H2229/036 ,  H01H2229/044 ,  Y10T29/49105 ,  Y10T29/53248

摘要： To separate resin molded parts that are used for a push button switch member with less light leakage from the side faces and less trouble in key operation, easily, a resin molded body comprises one or more resin molded parts for a push button switch member, a frame surrounding the outside of the resin molded parts, one or more gates connecting a plurality of the resin molded parts each other or the resin molded part to the frame and one or more runners crossing the longitudinal direction of the gates, wherein the gates are connected at the back faces of the resin molded parts not to be coated with light shielding paint, and wherein the runners are connected to the gates on the same surfaces as the resin molded parts are connected to and are connecting the opposing sides of the frame.

摘要翻译： 为了分离用于按钮开关部件的树脂模制部件，具有较少的侧面漏光和较少的按键操作麻烦，树脂成型体容易地包括用于按钮开关部件的一个或多个树脂模制部件， 围绕树脂模制部件的外侧的框架，将多个树脂模制部件彼此连接的一个或多个浇口或与框架连接的树脂模制部件以及与浇口的纵向方向交叉的一个或多个浇道，其中，浇口连接 在未被遮光涂料涂布的树脂成形部件的背面，在与树脂成形部连接并连接框架的相对侧的同一表面上连接有浇口。

公开(公告)号：US06950349B2

公开(公告)日：2005-09-27

申请号：US10600767

申请日：2003-06-23

申请人： Tomohiro Nakayama

发明人： Tomohiro Nakayama

IPC分类号： G11C16/02 ,  G11C16/10 ,  G11C7/00

CPC分类号： G11C16/102

摘要： A nonvolatile semiconductor memory is provided with a main memory array and a sub-memory array. When rewriting a portion of data having been written in the main memory cell array, a modification data is written into the sub-memory cell array without erasing said main memory cell array. Further, correspondent information on a first address of the main memory cell array storing a data to be modified and a second address of the sub-memory cell array storing the modification data is recorded. At the time of a readout operation, a readout address is compared with the first address recorded in the correspondent information. When said comparison result indicates consistency, a data in the sub-memory cell array of the second address corresponding to the first address is read out. Otherwise, when the comparison result indicates inconsistency, a data in the main memory cell array corresponding to the readout address is read out.

摘要翻译： 非易失性半导体存储器设置有主存储器阵列和子存储器阵列。 当重写已经写入主存储单元阵列的数据的一部分时，将修改数据写入子存储单元阵列而不擦除所述主存储单元阵列。 此外，记录存储要修改的数据的主存储单元阵列的第一地址和存储修改数据的子存储单元阵列的第二地址的对应信息。 在读出操作时，将读出的地址与记录在对应信息中的第一地址进行比较。 当所述比较结果指示一致时，读出与第一地址对应的第二地址的子存储单元阵列中的数据。 否则，当比较结果指示不一致时，读出对应于读出地址的主存储单元阵列中的数据。