公开(公告)号：US07253524B2

公开(公告)日：2007-08-07

申请号：US10797224

申请日：2004-03-10

Applicant: Zhen-Cheng Wu ,  Tzu-Jen Chou ,  Weng Chang ,  Yung-Cheng Lu ,  Syun-Ming Jang ,  Mong-Song Liang

Inventor： Zhen-Cheng Wu ,  Tzu-Jen Chou ,  Weng Chang ,  Yung-Cheng Lu ,  Syun-Ming Jang ,  Mong-Song Liang

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L21/76835 ,  H01L21/76807 ,  H01L21/76832 ,  H01L21/76834 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor substrate has a first copper layer, on which an etch stop layer and a dielectric layer are successively formed. A second copper layer penetrates the dielectric layer and the etch stop layer to electrically connect to the first metal layer. The etch stop layer has a dielectric constant smaller than 3.5, and the dielectric layer has a dielectric constant smaller than 3.0.

Abstract translation: 半导体衬底具有第一铜层，其上依次形成有蚀刻停止层和电介质层。 第二铜层穿透电介质层和蚀刻停止层以电连接到第一金属层。 蚀刻停止层的介电常数小于3.5，电介质层的介电常数小于3.0。

公开(公告)号：US07407601B2

公开(公告)日：2008-08-05

申请号：US10423569

申请日：2003-04-24

Applicant: Shen-Nan Lee ,  Ying-Ho Chen ,  Syun-Ming Jang ,  Tzu-Jen Chou

Inventor： Shen-Nan Lee ,  Ying-Ho Chen ,  Syun-Ming Jang ,  Tzu-Jen Chou

IPC: C09K5/00

CPC classification number: C09G1/02 ,  C09K3/1409 ,  C09K3/1463 ,  H01L21/3212

Abstract: A slurry system for a chemical mechanical polishing (CMP) process and a method for using the same wherein the slurry system includes an aqueous dispersion comprising at least abrasive polymer containing particles in an alkaline solution having a pH of less than about 9.5; and wherein the method includes providing a semiconductor wafer process surface including a oxide containing material and metal filled semiconductor features; providing the system; and, polishing in a CMP process the semiconductor wafer process surface using the slurry system to remove at least a portion of the oxide containing material and the metal comprising the metal filled semiconductor features.

Abstract translation: 用于化学机械抛光（CMP）方法的浆料系统及其使用方法，其中所述浆料系统包括含有至少含有在pH小于约9.5的碱性溶液中的含有颗粒的磨料聚合物的水分散体; 并且其中所述方法包括提供包括含氧化物材料和金属填充半导体特征的半导体晶片工艺表面; 提供系统; 并且在CMP工艺中使用浆料系统在半导体晶片工艺表面上抛光以去除含氧化物材料的至少一部分和包含金属填充的半导体特征的金属。

公开(公告)号：US06919276B2

公开(公告)日：2005-07-19

申请号：US10423436

申请日：2003-04-24

Applicant: Shen-Nan Lee ,  Ying-Ho Chen ,  Syun-Ming Jang ,  Tzu-Jen Chou ,  Jin-Yiing Song

Inventor： Shen-Nan Lee ,  Ying-Ho Chen ,  Syun-Ming Jang ,  Tzu-Jen Chou ,  Jin-Yiing Song

IPC: H01L21/321 ,  H01L21/768 ,  H01L21/302

CPC classification number: H01L21/7684 ,  H01L21/3212

Abstract: A CMP process for selectively polishing an overlying material layer with an underlying layer comprising at least one material in a semiconductor device fabrication process including providing a semiconductor wafer process surface including a first material layer overlying a second layer including one material; mixing at least two slurry mixtures including a first CMP slurry formulation optimized for removing the first material layer and a second CMP slurry formulation optimized for removing the at least a second layer to form a slurry formulation mixture; and, carrying out a CMP process using the slurry formulation mixture to remove the first material layer and at least a portion of the at least a second layer.

Abstract translation: 一种CMP工艺，用于在半导体器件制造工艺中用包括至少一种材料的下层选择性地抛光覆盖材料层，所述半导体器件制造工艺包括提供包括覆盖包括一种材料的第二层的第一材料层的半导体晶片工艺表面; 混合至少两种浆料混合物，其包括为了除去第一材料层而优化的第一CMP浆料配制剂和优化用于除去至少第二层以形成浆料配制混合物的第二CMP浆料配制剂; 以及使用所述浆料制剂混合物进行CMP处理以去除所述第一材料层和所述至少第二层的至少一部分。

公开(公告)号：US06924238B2

公开(公告)日：2005-08-02

申请号：US10455037

申请日：2003-06-05

Applicant: Tzu-Jen Chou ,  Syun-Ming Jang ,  Ying-Ho Chen ,  Shen-Nan Lee

Inventor： Tzu-Jen Chou ,  Syun-Ming Jang ,  Ying-Ho Chen ,  Shen-Nan Lee

IPC: H01L21/3105 ,  H01L21/311 ,  H01L21/312 ,  H01L21/316 ,  H01L21/768

CPC classification number: H01L21/31053 ,  H01L21/31056 ,  H01L21/31116 ,  H01L21/76835 ,  H01L21/7684

Abstract: A new method and structure is provided for the polishing of the surface of a layer of low-k dielectric material. Low-k dielectric material of low density and relatively high porosity is combined with low-k dielectric material of high density and low porosity whereby the latter high density layer is, prior to polishing of the combined layers, deposited over the former low density layer. Polishing of the combined layers removes flaking of the polished low-k layers of dielectric. This method can further be extended by forming conductive interconnects through the layers of dielectric, prior to the layer of dielectric.

Abstract translation: 提供了一种用于抛光低k电介质材料层的表面的新方法和结构。 低密度和相对高孔隙率的低k电介质材料与高密度和低孔隙率的低k电介质材料组合，由此后者的高密度层在组合层的抛光之前沉积在前者的低密度层上。 组合层的抛光消除抛光的低k层电介质的剥落。 在电介质层之前，可以通过在电介质层之间形成导电互连来进一步延长该方法。

公开(公告)号：US20050110153A1

公开(公告)日：2005-05-26

申请号：US10797224

申请日：2004-03-10

Applicant: Zhen-Cheng Wu ,  Tzu-Jen Chou ,  Weng Chang ,  Yung-Cheng Lu ,  Syun-Ming Jang ,  Mong-Song Liang

Inventor： Zhen-Cheng Wu ,  Tzu-Jen Chou ,  Weng Chang ,  Yung-Cheng Lu ,  Syun-Ming Jang ,  Mong-Song Liang

IPC: H01L21/44 ,  H01L21/768 ,  H01L23/48 ,  H01L23/532

CPC classification number: H01L21/76835 ,  H01L21/76807 ,  H01L21/76832 ,  H01L21/76834 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor substrate has a first copper layer, on which an etch stop layer and a dielectric layer are successively formed. A second copper layer penetrates the dielectric layer and the etch stop layer to electrically connect to the first metal layer. The etch stop layer has a dielectric constant smaller than 3.5, and the dielectric layer has a dielectric constant smaller than 3.0.

Abstract translation: 半导体衬底具有第一铜层，其上依次形成有蚀刻停止层和电介质层。 第二铜层穿透电介质层和蚀刻停止层以电连接到第一金属层。 蚀刻停止层的介电常数小于3.5，电介质层的介电常数小于3.0。