Method for the preparation of piperazine and its derivatives
    4.
    发明授权
    Method for the preparation of piperazine and its derivatives 失效
    哌嗪及其衍生物的制备方法

    公开(公告)号:US06603003B2

    公开(公告)日:2003-08-05

    申请号:US10037309

    申请日:2001-10-25

    IPC分类号: C07D24104

    摘要: A novel method for the synthesis of piperazine and its derivatives of formula 1, wherein R is selected from hydrogen, or a lower alkyl group having 1 to 6 carbon atoms or a phenylalkyl group the alkyl of which has 1 to 4 carbon atoms; R1 is selected from hydrogen, a methyl group, a phenyl group optionally substituted with an alkyl group having 1 to 6 carbon atoms, or a phenylalkyl group the alkyl of which has 1 to 4 carbon atoms; and R2 is selected from hydrogen, or a methyl group, or a fluoromethyl group; comprising the steps: a. reacting an ester of formula 11 with substituted or unsubstituted ethylenediamine of formula 7 to give 3,4-dehydropiperazine-2-one and its derivatives of formula 12, wherein R, R1, R2 are as defined above and R6 is a C1 to C4 linear or branched alkyl group; and b. reacting the 3,4-dehydro-piperazine-2-one and its derivatives of formula 12 with a reducing agent to yield the piperazine and its derivatives of formula 1.

    摘要翻译: 合成哌嗪及其衍生物的新颖方法,其中R选自氢或具有1至6个碳原子的低级烷基或苯基烷基,其烷基具有1至4个碳原子; R 1为 选自氢,甲基,任选被具有1至6个碳原子的烷基取代的苯基,或其烷基具有1至4个碳原子的苯基烷基; 和R 2选自氢或甲基或氟甲基;所述方法包括以下步骤:a。 使式11的酯与取代或未取代的式7的乙二胺反应,得到3,4-脱水哌嗪-2-酮及其式12的衍生物,其中R,R 1,R 2如上所定义,R 6是C 1至C 4直链 或支链烷基; 安布 使3,4-脱氢 - 哌嗪-2-酮及其式12的衍生物与还原剂反应,得到哌嗪及其式1的衍生物。

    Statistics data collection mechanism for distributed, high-speed data processing environments
    6.
    发明授权
    Statistics data collection mechanism for distributed, high-speed data processing environments 有权
    统计数据采集机制,用于分布式,高速数据处理环境

    公开(公告)号:US07187683B1

    公开(公告)日:2007-03-06

    申请号:US10013386

    申请日:2001-12-07

    IPC分类号: H04L12/28

    CPC分类号: H04L41/142 H04L43/04

    摘要: A statistics data collection mechanism for distributed, high-speed data processing environments is described. According to one embodiment, an update message containing statistics data related to a data packet carried along a virtual connection is assembled and the update message is then transmitted to a statistics collection engine for further processing. According to another embodiment, the update message is received from one or more processing devices, and multiple counters are then updated to store the statistics data.

    摘要翻译: 描述了用于分布式高速数据处理环境的统计数据收集机制。 根据一个实施例,组装包含与虚拟连接携带的数据分组有关的统计数据的更新消息,并且将更新消息发送到统计收集引擎用于进一步处理。 根据另一个实施例,从一个或多个处理设备接收更新消息,然后更新多个计数器以存储统计数据。

    Integrated circuit routing
    7.
    发明授权
    Integrated circuit routing 有权
    集成电路布线

    公开(公告)号:US06704918B1

    公开(公告)日:2004-03-09

    申请号:US09311981

    申请日:1999-05-14

    IPC分类号: G06F1750

    CPC分类号: G06F17/5077 H01L27/0207

    摘要: A technique is described for enabling routing of metallisation wires over sensitive cells of an integrated circuit by means of a global router after the cell circuits have been designed. At least one cell includes dedicated route paths (32, 36, 40, 46) as part of the cell design. The paths may include alternative paths (32 and 36), and concurrently usable paths (40 and 46). By including the routes as part of the cell design, the subsequent problems of a global routing tool routing wires over sensitive areas of the cell can be avoided, and the number of wire routes can be controlled. The global router operates by detecting whether dedicated routes are provided and, if so, identifying the entry/exit points for routes to be used.

    摘要翻译: 描述了一种技术,用于在单元电路被设计之后通过全局路由器实现金属化导线在集成电路的敏感单元上的路由。 至少一个单元包括作为单元设计的一部分的专用路径路径(32,36,40,46)。 路径可以包括替代路径(32和36)以及可同时使用的路径(40和46)。 通过将路由作为单元设计的一部分,可以避免在单元的敏感区域上布线的全局布线工具的后续问题,并且可以控制线路数量。 全局路由器通过检测是否提供专用路由器进行操作,如果是,则识别要使用的路由的入口/出口点。

    Apparatus and method for translating a programmable logic device programmer object file
    8.
    发明授权
    Apparatus and method for translating a programmable logic device programmer object file 有权
    用于翻译可编程逻辑器件编程器对象文件的装置和方法

    公开(公告)号:US06651155B1

    公开(公告)日:2003-11-18

    申请号:US09918907

    申请日:2001-07-30

    IPC分类号: G06F1200

    CPC分类号: G06F17/5054

    摘要: A circuit for translating a configuration file used to configure a programmable logic device includes a first register to serially receive configuration data. A second register receives, in parallel, configuration data from the first register. A translation address memory translates an original address for a selected configuration bit of the configuration data to a translated address. A translation memory stores the selected configuration bit at the translated address. Control logic selectively downloads configuration data from the translation memory to a programmable logic device core.

    摘要翻译: 用于翻译用于配置可编程逻辑器件的配置文件的电路包括用于串行接收配置数据的第一寄存器。 第二寄存器并行地接收来自第一寄存器的配置数据。 翻译地址存储器将配置数据的所选配置位的原始地址翻译为翻译地址。 翻译记忆库将选择的配置位存储在转换的地址处。 控制逻辑选择性地将配置数据从翻译存储器下载到可编程逻辑器件核心。