公开(公告)号：USD860846S1

公开(公告)日：2019-09-24

申请号：US29633906

申请日：2018-01-17

申请人： Jeffrey Wang Lee

设计人： Jeffrey Wang Lee

公开(公告)号：US09741434B2

公开(公告)日：2017-08-22

申请号：US14018287

申请日：2013-09-04

申请人： Akira Katayama ,  Masahiro Takahashi ,  Tsuneo Inaba ,  Hyuck Sang Yim ,  Dong Keun Kim ,  Byoung Chan Oh ,  Ji Wang Lee

发明人： Akira Katayama ,  Masahiro Takahashi ,  Tsuneo Inaba ,  Hyuck Sang Yim ,  Dong Keun Kim ,  Byoung Chan Oh ,  Ji Wang Lee

IPC分类号： G11C5/06 ,  G11C13/00 ,  G11C11/16

CPC分类号： G11C13/004 ,  G11C5/06 ,  G11C11/16 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1673 ,  G11C2013/0054

摘要： According to one embodiment, a memory includes a memory cell array including blocks arranged in a column direction, first and second main global conductive lines each extending from a first end to a second end of the memory cell array in the column direction, a first resistance change element connected between the first and second main global conductive lines inside the memory cell array, a first reference global conductive line extending from the first end to the second end of the memory cell array in the column direction, and a second resistance change element connected to the reference global conductive line outside the memory cell array.

公开(公告)号：US20160346131A1

公开(公告)日：2016-12-01

申请号：US14725559

申请日：2015-05-29

申请人： John David FERGASON ,  Anthony WANG LEE

发明人： John David FERGASON

IPC分类号： A61F9/06 ,  G02F1/133 ,  G02F1/137 ,  G01J1/44

CPC分类号： A61F9/065 ,  G01J1/18 ,  G01J1/26 ,  G01J2001/0276 ,  G02F1/13318

摘要： An auto-darkening filter of a welding shield has a brightness-sensing unit, an optical shutter and a processor. The brightness-sensing unit generates a first signal or a second signal. In a high-sensitivity mode, the processor controls the optical shutter to operate in a dark state or a bright state depending on intensity of the first signal being higher or lower than a threshold value. In a low-sensitivity mode, the processor controls the optical shutter to operate in the bright state when intensity of the second signal is lower than the threshold value, and automatically change to the high-sensitivity mode from the low-sensitivity mode when intensity of the second signal is higher than the threshold value.

摘要翻译： 焊接屏蔽的自动变暗滤光器具有亮度感测单元，光学快门和处理器。 亮度感测单元产生第一信号或第二信号。 在高感光度模式中，处理器根据第一信号的强度高于或低于阈值来控制光学快门以处于黑暗状态或明亮状态。 在低灵敏度模式下，当第二信号的强度低于阈值时，处理器控制光学快门处于亮状态，并且当强度为低灵敏度模式时，自动地从低灵敏度模式变为高灵敏度模式 第二信号高于阈值。

公开(公告)号：US20150202086A1

公开(公告)日：2015-07-23

申请号：US14160619

申请日：2014-01-22

申请人： Wang-Lee Tzu-Feng

发明人： Wang-Lee Tzu-Feng

IPC分类号： A61F9/02

CPC分类号： A61F9/025 ,  A61F9/027 ,  A61F2009/021

摘要： A goggle assembly, wherein a spectacle frame body combined with spectacle lenses, which have a predetermined function, is formed by continuing connecting portions between an upper section and a lower section of a rigid frame body, which is near an outer periphery, with at least one connecting part to form into a single part without a break. Therefore, positions of the rigid frame body near the outer periphery don't need to be adjusted further when the rigid frame body is put into a mold. The upper section and the lower section of the rigid frame body and the connecting parts at the connecting portions are covered by injection molding, and a flexible leaning part is integrally formed near an inner periphery. Thereby, the formation of the spectacle frame body is more convenient. The spectacle frame body has an aligned exact shape and maintains its original comfort and softness.

摘要翻译： 一种护目镜组件，其中具有预定功能的与眼镜镜片结合的眼镜框架体通过至少在外围的刚体框架体的上部和下部之间连续连接而形成 一个连接部分形成一个单独的部分，没有休息。 因此，当将刚性框架体放入模具中时，不需要进一步调整刚性框体在外周附近的位置。 刚性框架体的上部和下部以及连接部分处的连接部分被注射成型覆盖，并且柔性的倾斜部分在内周附近一体形成。 由此，眼镜框体的形成更加方便。 眼镜框体具有对准的精确形状，并保持其原有的舒适性和柔软性。

公开(公告)号：US08947920B2

公开(公告)日：2015-02-03

申请号：US14018148

申请日：2013-09-04

申请人： Masahiro Takahashi ,  Tsuneo Inaba ,  Dong Keun Kim ,  Ji Wang Lee

发明人： Masahiro Takahashi ,  Tsuneo Inaba ,  Dong Keun Kim ,  Ji Wang Lee

IPC分类号： G11C11/00 ,  G11C11/16

CPC分类号： G11C11/1673 ,  G11C11/161 ,  G11C11/1659

摘要： According to one embodiment, a memory device includes a memory cell, a sense amplifier, unit structures and a reference signal generator. Each structure includes a first end, a first transistor, a first local line, a variable resistance element, a second transistor, a second local line, and a third transistor coupled in series. The reference signal generator includes first to fourth global lines, and first and second ones of the unit structures. The first unit structure is coupled at the first end to the first global line and coupled at the second end to the third global line. The second unit structure is coupled at the first end to the fourth global line and coupled at the second end to the second global line.

摘要翻译： 根据一个实施例，存储器件包括存储器单元，读出放大器，单元结构和参考信号发生器。 每个结构包括第一端，第一晶体管，第一局部线，可变电阻元件，第二晶体管，第二本地线和串联耦合的第三晶体管。 参考信号发生器包括第一至第四全局线，以及第一和第二单元结构。 第一单元结构在第一端耦合到第一全局线并且在第二端耦合到第三全局线。 第二单元结构在第一端耦合到第四全局线并且在第二端耦合到第二全局线。

公开(公告)号：US20140286088A1

公开(公告)日：2014-09-25

申请号：US14018148

申请日：2013-09-04

申请人： Masahiro TAKAHASHI ,  Tsuneo INABA ,  Dong Keun KIM ,  Ji Wang LEE

发明人： Masahiro TAKAHASHI ,  Tsuneo INABA ,  Dong Keun KIM ,  Ji Wang LEE

IPC分类号： G11C11/16

CPC分类号： G11C11/1673 ,  G11C11/161 ,  G11C11/1659

摘要： According to one embodiment, a memory device includes a memory cell, a sense amplifier, unit structures and a reference signal generator. Each structure includes a first end, a first transistor, a first local line, a variable resistance element, a second transistor, a second local line, and a third transistor coupled in series. The reference signal generator includes first to fourth global lines, and first and second ones of the unit structures. The first unit structure is coupled at the first end to the first global line and coupled at the second end to the third global line. The second unit structure is coupled at the first end to the fourth global line and coupled at the second end to the second global line.

摘要翻译： 根据一个实施例，存储器件包括存储器单元，读出放大器，单元结构和参考信号发生器。 每个结构包括第一端，第一晶体管，第一局部线，可变电阻元件，第二晶体管，第二本地线和串联耦合的第三晶体管。 参考信号发生器包括第一至第四全局线，以及第一和第二单元结构。 第一单元结构在第一端耦合到第一全局线并且在第二端耦合到第三全局线。 第二单元结构在第一端耦合到第四全局线并且在第二端耦合到第二全局线。

公开(公告)号：US08820920B2

公开(公告)日：2014-09-02

申请号：US13655493

申请日：2012-10-19

申请人： Wang Lee Chen Chang

发明人： Wang Lee Chen Chang

IPC分类号： G02C5/00

CPC分类号： G02C5/006 ,  G02C1/08 ,  G02C2200/08

摘要： The present invention provides an eyeglass frame securement apparatus comprising an eyeglass frame with upper and lower frames for eyeglasses to be mounted thereon, two outer sides of said upper and lower frames attached to eyeglass temples, a protection strip frame locked into inner circumference of said eyeglass frame; protruding pins extending forward and rearward from a center of the lower frame pivotally attached to the upper frame; a rib extending from outer sides of the upper frame and inserted into grooves to restrict the eyeglasses; protrusions on upper end of supporting shaft of the eyeglass temples inserted into the spaces on the outer side of said lower fame. Therefore, once the upper frame is completely assembled, said eyeglass temples can be outwardly bent to allow said protrusions on the upper end thereof to extend outward from the horizontal hole of the upper frame to restrict said eyeglass temples directionally.

摘要翻译： 本发明提供一种眼镜架固定装置，其包括：眼镜架，其具有用于安装在其上的眼镜的上框架和下框架，所述上框架和下框架的两个外侧附接到眼镜镜腿;保护条框架，锁定在所述眼镜的内周 帧; 突出的销从下框架的中心向前和向后延伸，枢转地附接到上框架; 从上框架的外侧延伸并插入凹槽以限制眼镜的肋条; 眼镜镜腿支撑轴上端的突起插入所述下限外侧的空间。 因此，一旦上框架完全组装，所述眼镜腿可以向外弯曲，以允许其上端上的所述突出部从上框架的水平孔向外延伸，从而限制所述眼镜镜腿。

公开(公告)号：US20140111762A1

公开(公告)日：2014-04-24

申请号：US13655493

申请日：2012-10-19

申请人： Wang Lee Chen Chang

发明人： Wang Lee Chen Chang

IPC分类号： G02C5/00

CPC分类号： G02C5/006 ,  G02C1/08 ,  G02C2200/08

摘要： The present invention provides an eyeglass frame securement apparatus comprising an eyeglass frame with upper and lower frames for eyeglasses to be mounted thereon, two outer sides of said upper and lower frames attached to eyeglass temples, a protection strip frame locked into inner circumference of said eyeglass frame; protruding pins extending forward and rearward from a center of the lower frame pivotally attached to the upper frame; a rib extending from outer sides of the upper frame and inserted into grooves to restrict the eyeglasses; protrusions on upper end of supporting shaft of the eyeglass temples inserted into the spaces on the outer side of said lower fame. Therefore, once the upper frame is completely assembled, said eyeglass temples can be outwardly bent to allow said protrusions on the upper end thereof to extend outward from the horizontal hole of the upper frame to restrict said eyeglass temples directionally.

摘要翻译： 本发明提供一种眼镜架固定装置，其包括：眼镜架，其具有用于安装在其上的眼镜的上框架和下框架，所述上框架和下框架的两个外侧附接到眼镜镜腿;保护条框架，锁定在所述眼镜的内周 帧; 突出的销从下框架的中心向前和向后延伸，枢转地附接到上框架; 从上框架的外侧延伸并插入凹槽以限制眼镜的肋条; 眼镜镜腿支撑轴上端的突起插入所述下限外侧的空间。 因此，一旦上框架完全组装，所述眼镜腿可以向外弯曲，以允许其上端上的所述突出部从上框架的水平孔向外延伸，从而限制所述眼镜镜腿。

公开(公告)号：US20120140870A1

公开(公告)日：2012-06-07

申请号：US12980643

申请日：2010-12-29

申请人： Ji-Wang LEE ,  Shin-Deok KANG

发明人： Ji-Wang LEE ,  Shin-Deok KANG

IPC分类号： H03K23/00

CPC分类号： G06F1/10 ,  H03K21/406 ,  H03K23/425

摘要： An integrated circuit includes a counter configured to perform a counting operation and output a count code value. The integrated circuit further includes an operation controller, a digital circuit and an alignment unit. The operation controller receives the count code value and generates a first control signal and a second control signal. The first control signal is generated, when the count code value is equal to a first value, which is counted by the counter prior to a target count value. The second control signal is generated, when the count code value is equal to the target count value. A digital circuit performs a first operation based on the first control signal, and output a digital signal. An alignment unit aligns the digital signal, and outputs the aligned digital signal as a final digital signal in response to the second control signal.

摘要翻译： 集成电路包括配置为执行计数操作并输出计数代码值的计数器。 集成电路还包括操作控制器，数字电路和对准单元。 操作控制器接收计数代码值并产生第一控制信号和第二控制信号。 当计数码值等于由计数器在目标计数值之前计数的第一值时，产生第一控制信号。 当计数码值等于目标计数值时，产生第二控制信号。 数字电路基于第一控制信号执行第一操作，并输出数字信号。 对准单元对准数字信号，并响应于第二控制信号而输出对准的数字信号作为最终的数字信号。

公开(公告)号：US08189400B2

公开(公告)日：2012-05-29

申请号：US12647174

申请日：2009-12-24

申请人： Hyung Soo Kim ,  Yong Ju Kim ,  Sung Woo Han ,  Hee Woong Song ,  Ic Su Oh ,  Tae Jin Hwang ,  Hae Rang Choi ,  Ji Wang Lee ,  Jae Min Jang ,  Chang Kun Park

发明人： Hyung Soo Kim ,  Yong Ju Kim ,  Sung Woo Han ,  Hee Woong Song ,  Ic Su Oh ,  Tae Jin Hwang ,  Hae Rang Choi ,  Ji Wang Lee ,  Jae Min Jang ,  Chang Kun Park

IPC分类号： G11C7/00

CPC分类号： G11C7/1006 ,  G11C7/1012 ,  G11C7/1078 ,  G11C7/1087

摘要： A data alignment circuit of a semiconductor memory apparatus for receiving and aligning parallel data group includes a first control unit, a second control unit, a first alignment unit and a second alignment unit. The first alignment unit generates a first control signal group in response to an address group, a clock signal, and a latency signal. The second control unit generates a second control signal group in response to the address group, the clock signal, and the latency signal. The first alignment unit aligns the parallel data group as a first serial data group in response to the first control signal group. The second alignment unit aligns the parallel data group as a second serial data group in response to the second control signal group.

摘要翻译： 用于接收和对准并行数据组的半导体存储装置的数据对准电路包括第一控制单元，第二控制单元，第一对准单元和第二对准单元。 第一对准单元响应于地址组，时钟信号和等待时间信号产生第一控制信号组。 第二控制单元响应于地址组，时钟信号和等待时间信号产生第二控制信号组。 第一对准单元响应于第一控制信号组将并行数据组对准为第一串行数据组。 第二对准单元响应于第二控制信号组将并行数据组对准为第二串行数据组。