公开(公告)号：US5958019A

公开(公告)日：1999-09-28

申请号：US674328

申请日：1996-07-01

申请人： Erik E. Hagersten ,  Robert C. Zak, Jr. ,  Shaw-Wen Yang ,  Aleksandr Guzovskiy ,  William A. Nesheim ,  Monica C. Wong-Chan ,  Hien Nguyen

发明人： Erik E. Hagersten ,  Robert C. Zak, Jr. ,  Shaw-Wen Yang ,  Aleksandr Guzovskiy ,  William A. Nesheim ,  Monica C. Wong-Chan ,  Hien Nguyen

IPC分类号： G06F9/52 ,  G06F9/46 ,  G06F12/08 ,  G06F13/42

CPC分类号： G06F9/52 ,  G06F12/0828

摘要： When a processor within a computer system performs a synchronization operation, the system interface within the node delays subsequent transactions from the processor until outstanding coherency activity is completed. Therefore, the computer system may employ asynchronous operations. The synchronization operations may be used when needed to guarantee global completion of one or more prior asynchronous operations. In one embodiment, the synchronization operation is placed into a queue within the system interface. When the synchronization operation reaches the head of the queue, it may be initiated within the system interface. The system interface further includes a request agent comprising multiple control units, each of which may concurrently service coherency activity with respect to a different transaction. Furthermore, the system interface includes a synchronization control vector register which stores a bit for each control unit. Upon initiation of the synchronization operation within the system interface, bits corresponding to those control units which are performing coherency activity (i.e. those which are not idle) are set while other bits are cleared. As each control unit returns to the idle state, the corresponding bit is cleared as well. Once all the bits within the synchronization control vector register are cleared, the coherency activity which was outstanding when the synchronization operation was initiated is complete. The synchronization operation may then be completed.

摘要翻译： 当计算机系统内的处理器执行同步操作时，节点内的系统接口会延迟来自处理器的后续事务，直到完成一致的一致性活动。 因此，计算机系统可以采用异步操作。 当需要保证一个或多个在先的异步操作的全局完成时，可以使用同步操作。 在一个实施例中，同步操作被放置在系统接口内的队列中。 当同步操作到达队列的头部时，可以在系统界面内启动。 该系统接口还包括一个包含多个控制单元的请求代理，每个控制单元可以相对于不同的事务同时提供一致性活动。 此外，系统接口包括存储每个控制单元的位的同步控制向量寄存器。 在系统接口中启动同步操作之后，在执行一致性活动的那些控制单元（即那些不空闲的）的对应的位被设置，而其它位被清除。 当每个控制单元返回到空闲状态时，相应的位也被清除。 一旦清除了同步控制向量寄存器中的所有位，完成了同步操作启动时未完成的一致性活动。 然后可以完成同步操作。

公开(公告)号：US5898840A

公开(公告)日：1999-04-27

申请号：US673049

申请日：1996-07-01

申请人： Aleksandr Guzovskiy ,  William A. Nesheim ,  Ashok Singhal

发明人： Aleksandr Guzovskiy ,  William A. Nesheim ,  Ashok Singhal

IPC分类号： G06F9/46 ,  G06F15/16

CPC分类号： G06F9/52

摘要： In a multiprocessor system, a method, apparatus, and article of manufacture for maintaining the proper sequence of store/write operations between multiple processors to remote I/O devices without requiring changes to application software. A synchronizer is employed to synchronize write operations to the remote I/O device, and the write operations are synchronized individually upon detection and emulation, or as a group upon detection of the release of a mutual exclusion lock.

摘要翻译： 在多处理器系统中，一种方法，装置和制品，用于将多个处理器之间的存储/写入操作的适当序列维持到远程I / O设备，而不需要更改应用软件。 使用同步器将写入操作与远程I / O设备同步，并且在检测和仿真时单独同步写入操作，或者在检测到互斥锁的释放时作为组。

公开(公告)号：US06449700B2

公开(公告)日：2002-09-10

申请号：US09148735

申请日：1998-09-04

申请人： Erik E. Hagersten ,  Christopher J. Jackson ,  Aleksandr Guzovskiy ,  William A. Nesheim

发明人： Erik E. Hagersten ,  Christopher J. Jackson ,  Aleksandr Guzovskiy ,  William A. Nesheim

IPC分类号： G06F1200

CPC分类号： G06F11/0712 ,  G06F11/0724 ,  G06F11/073 ,  G06F11/0766 ,  G06F12/0284 ,  G06F12/0864 ,  G06F12/1018 ,  G06F12/1072 ,  G06F2212/2542 ,  G06F2212/272

摘要： A multiprocessing system includes a plurality of nodes interconnected through a global interconnect network which supports cluster communications. An initiating node may launch a request to a remote node's memory. A cluster protection mechanism is employed within a system interface of the remote node. The system interface, which is coupled between the global interconnect network and a local bus of the remote node, includes a memory management unit, referred to as a cluster MMU, including a plurality of entries which are selectable on a page basis. Depending upon the particular address of a received global transaction, an entry within the memory management unit is retrieved. The entry includes various fields which may be used to protect against accesses by unauthorized nodes, and to specify the local physical address to be conveyed upon the local bus. A field of the entry is further provided to control the type of operation performed upon the local bus by the system interface in response to the global interface. In one implementation, several different command types may be specified by the particular entry of the memory management unit, including normal memory operations, atomic test and set operations, I/O operations and interrupt operations, among others. Additional control registers may further be provided within the system interface to specify further protection parameters and/or functionality. For example, in one embodiment, a control register is provided within the system interface to store values indicative of the other nodes of the system which are allowed access to this node's local memory.

摘要翻译： 多处理系统包括通过支持集群通信的全局互连网络互连的多个节点。 发起节点可以向远程节点的存储器发起请求。 在远程节点的系统接口内采用集群保护机制。 耦合在全局互连网络和远程节点的本地总线之间的系统接口包括被称为集群MMU的存储器管理单元，其包括可以基于页面选择的多个条目。 取决于接收到的全局事务的特定地址，检索存储器管理单元内的条目。 该条目包括可用于防止未授权节点访问的各种字段，以及指定要在本地总线上传送的本地物理地址。 进一步提供条目的字段以响应于全局接口来控制由系统接口对本地总线执行的操作的类型。 在一个实现中，可以通过存储器管理单元的特定条目来指定几种不同的命令类型，包括常规存储器操作，原子测试和设置操作，I / O操作和中断操作等。 可以进一步在系统接口内提供额外的控制寄存器以指定进一步的保护参数和/或功能。 例如，在一个实施例中，在系统接口内提供控制寄存器以存储指示允许访问该节点的本地存储器的系统的其他节点的值。

公开(公告)号：US5897664A

公开(公告)日：1999-04-27

申请号：US673043

申请日：1996-07-01

申请人： William A. Nesheim ,  Aleksandr Guzovskiy

发明人： William A. Nesheim ,  Aleksandr Guzovskiy

IPC分类号： G06F12/02 ,  G06F12/08 ,  G06F12/10

CPC分类号： G06F12/0284 ,  G06F12/0813 ,  G06F12/1027 ,  G06F12/1072

摘要： In a multiprocessor computing system, virtual memory addresses are mapped to local physical memory addresses of an attraction memory, containing a replication of the data contained at remote physical addresses, in a node of the system. A mapping table is created and maintained in each node of the system to supplement a conventional page table. The mapping table is used to map a global physical address to a local physical address of the replicated page of memory. System performance is enhanced by subsequent access to the data stored at the local physical address, as opposed to the remote physical address.

摘要翻译： 在多处理器计算系统中，将虚拟存储器地址映射到系统的节点中的包含远程物理地址所包含的数据的复制的引力存储器的本地物理存储器地址。 在系统的每个节点中创建和维护映射表以补充传统的页表。 映射表用于将全局物理地址映射到内存复制页的本地物理地址。 通过后续访问存储在本地物理地址上的数据，而不是远程物理地址来增强系统性能。

公开(公告)号：US5862316A

公开(公告)日：1999-01-19

申请号：US674276

申请日：1996-07-01

申请人： Erik E. Hagersten ,  John R. Catenzaro ,  William A. Nesheim ,  Monica C. Wong-Chan ,  Robert C. Zak, Jr. ,  Paul N. Loewenstein

发明人： Erik E. Hagersten ,  John R. Catenzaro ,  William A. Nesheim ,  Monica C. Wong-Chan ,  Robert C. Zak, Jr. ,  Paul N. Loewenstein

IPC分类号： G06F11/34 ,  G06F11/00 ,  G06F11/22 ,  G06F12/08

CPC分类号： G06F11/2205 ,  Y10S707/99952

摘要： Protocol agents involved in the performance of global coherency activity detect errors with respect to the activity being performed. The errors are logged by a computer system such that diagnostic software may be executed to determine the error detected and to trace the error to the erring software or hardware. In particular, information regarding the first error to be detected is logged. Subsequent errors may receive more or less logging depending upon programmable configuration values. Additionally, those errors which receive full logging may be programmably selected via error masks. The protocol agents each comprise multiple independent state machines which independently process requests. If the request which a particular state machine is processing results in an error, the particular state machine may enter a freeze state. Information regarding the request which is collected by the state machine may thereby be saved for later access. A state machine freezes upon detection of the error if a maximum number of the multiple state machines are not already frozen and the aforementioned error mask indicates that full error logging is employed for the detected error. Therefore, at least a minimum number of the multiple state machines remain functioning even in the presence of a large number of errors. Still further, prior to entering the freeze state, the protocol state machines may transition through a recovery state in which resources not used for error logging purposes are freed from the erring request.

摘要翻译： 参与执行全局一致性活动的协议代理检测相对于正在执行的活动的错误。 这些错误由计算机系统记录，使得可以执行诊断软件以确定检测到的错误并将错误跟踪到错误的软件或硬件。 特别地，记录关于要检测的第一错误的信息。 随后的错误可能会根据可编程的配置值接收或多或少的记录。 此外，可以通过错误掩码可编程地选择接收完整日志记录的错误。 协议代理各自包括独立处理请求的多个独立状态机。 如果特定状态机正在处理的请求导致错误，则特定状态机可能进入冻结状态。 关于由国家机器收集的关于请求的信息可以被保存以供稍后访问。 如果多个状态机的最大数量尚未冻结，并且上述错误掩码表示对于检测到的错误采用全错误记录，则状态机将在检测到错误后冻结。 因此，即使存在大量错误，至少多个状态机的最小数量也保持运行。 此外，在进入冻结状态之前，协议状态机可以转换到恢复状态，其中不用于错误记录的资源的资源从错误请求中解除。

公开(公告)号：US5222216A

公开(公告)日：1993-06-22

申请号：US729429

申请日：1991-07-12

申请人： Edward C. Parish ,  Robert A. Doolittle ,  Sharon E. Gillett ,  Thomas J. Moser ,  William A. Nesheim ,  David L. Satterfield ,  James P. Tardiff

发明人： Edward C. Parish ,  Robert A. Doolittle ,  Sharon E. Gillett ,  Thomas J. Moser ,  William A. Nesheim ,  David L. Satterfield ,  James P. Tardiff

IPC分类号： G06F13/38 ,  G06F13/40

CPC分类号： G06F13/387 ,  G06F13/4022

摘要： A high performance communications interface device for connecting a high speed computer to a high performance communications bus. The high performance communications interface device includes a high performance communications interface device processor, a source interface, a destination interface and at least one I/O processor which controls the transfer of data to the high speed computer from the high performance communications bus and from the high speed computer to the high performance communications bus.

摘要翻译： 一种用于将高速计算机连接到高性能通信总线的高性能通信接口设备。 高性能通信接口设备包括高性能通信接口设备处理器，源接口，目的接口和至少一个I / O处理器，其控制从高性能通信总线和从高性能通信总线向高速计算机传输数据 高速电脑到高性能通信总线。

公开(公告)号：US06401174B1

公开(公告)日：2002-06-04

申请号：US09148734

申请日：1998-09-04

申请人： Erik E. Hagersten ,  Christopher J. Jackson ,  Aleksandr Guzovskiy ,  William A. Nesheim

发明人： Erik E. Hagersten ,  Christopher J. Jackson ,  Aleksandr Guzovskiy ,  William A. Nesheim

IPC分类号： G06F1200

CPC分类号： G06F11/0712 ,  G06F11/0724 ,  G06F11/073 ,  G06F11/0766 ,  G06F12/0284 ,  G06F12/0864 ,  G06F12/1018 ,  G06F12/1072 ,  G06F2212/2542 ,  G06F2212/272

摘要： In one embodiment, a multiprocessing computer system includes a plurality of nodes. The plurality of nodes may be interconnected through a global interconnect network which supports cluster communications. An initiating node may launch a request to a remote nodes memory. In the event of an error, an error status register of a system interface of the launching cluster node is set to indicate the occurrence of an error. The error may be the result of an access violation, or the result of a time-out occurrence in either the remote node or the initiating node. Various other errors may alternatively be reported. The system interface advantageously includes a plurality of error status registers, with a separate error status register provided for each processor included in the node. A process running on any of the processors of the node reads an error by issuing a transaction to a unique address, wherein the unique address is independent of the processor upon which the process is running. The unique address as well as the transaction ID indicative of the processor which is attempting to read an error status are used by the system interface to determine which of the plurality of error status registers to access.

摘要翻译： 在一个实施例中，多处理计算机系统包括多个节点。 多个节点可以通过支持集群通信的全局互连网络互连。 发起节点可以向远程节点存储器发起请求。 发生错误时，将启动集群节点的系统接口的错误状态寄存器设置为指示发生错误。 错误可能是访问冲突的结果，也可能是远程节点或发起节点中发生超时的结果。 也可以报告各种其它错误。 系统接口有利地包括多个错误状态寄存器，其中为每个包括在节点中的处理器提供单独的错误状态寄存器。 在节点的任何处理器上运行的进程通过向唯一地址发出事务来读取错误，其中唯一地址独立于进程正在运行的处理器。 系统接口使用唯一地址以及指示正在尝试读取错误状态的处理器的事务ID来确定要访问的多个错误状态寄存器中的哪一个。