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19 条记录 (耗时 0.018 秒)

    INTERNAL VOLTAGE GENERATION CIRCUIT AND METHOD
    2.
    发明申请
    INTERNAL VOLTAGE GENERATION CIRCUIT AND METHOD 审中-公开
    内部电压发生电路及方法

    公开(公告)号：US20130093490A1

    公开(公告)日：2013-04-18

    申请号：US13333043

    申请日：2011-12-21

    申请人： Hyun Seok KIM ,  Ic Su OH ,  Jun Ho LEE ,  Boo Ho JUNG ,  Sun Ki CHO ,  Yang Hee KIM

    发明人： Hyun Seok KIM ,  Ic Su OH ,  Jun Ho LEE ,  Boo Ho JUNG ,  Sun Ki CHO ,  Yang Hee KIM

    IPC分类号： H03L5/00

    CPC分类号： H02M3/07 ,  H02M3/1584

    摘要： An internal voltage generation method includes the steps of: setting first to third sections by using a reference voltage; determining to which section an internal voltage level corresponds, among the first to third sections; and generating the internal voltage by controlling a voltage pumping amount according to a section corresponding to the internal voltage level.

    摘要翻译： 内部电压产生方法包括以下步骤：通过使用参考电压来设置第一至第三部分; 在第一至第三部分中确定内部电压电平对应于哪个部分; 以及通过根据对应于内部电压电平的部分控制电压抽取量来产生内部电压。

    Semiconductor integrated circuit
    3.
    发明授权
    Semiconductor integrated circuit 失效
    半导体集成电路

    公开(公告)号：US08421528B2

    公开(公告)日：2013-04-16

    申请号：US13097326

    申请日：2011-04-29

    申请人： Hyun Seok Kim ,  Jun Ho Lee ,  Boo Ho Jung ,  Sun Ki Cho ,  Yang Hee Kim ,  Young Won Kim

    发明人： Hyun Seok Kim ,  Jun Ho Lee ,  Boo Ho Jung ,  Sun Ki Cho ,  Yang Hee Kim ,  Young Won Kim

    IPC分类号： G05F1/10

    CPC分类号： H01L23/5286 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor integrated circuit includes a first voltage line to which a first ground voltage is applied, a second voltage line to which a second ground voltage is applied, a third voltage line to which a first power supply voltage is applied, and a coupling unit including a MOS transistor having a source coupled to the first voltage line, a drain coupled to the second voltage line, and a gate coupled to the third voltage line.

    摘要翻译： 半导体集成电路包括施加第一接地电压的第一电压线，施加第二接地电压的第二电压线，施加第一电源电压的第三电压线，以及包括 MOS晶体管，其具有耦合到第一电压线的源极，耦合到第二电压线的漏极和耦合到第三电压线的栅极。

    OUTPUT CIRCUIT OF SEMICONDUCTOR APPARATUS HAVING TWO DIFFERENT TYPES OF DECOUPLING CAPACITORS
    7.
    发明申请
    OUTPUT CIRCUIT OF SEMICONDUCTOR APPARATUS HAVING TWO DIFFERENT TYPES OF DECOUPLING CAPACITORS 失效
    具有两种不同类型的解耦电容器的半导体装置的输出电路

    公开(公告)号：US20110187450A1

    公开(公告)日：2011-08-04

    申请号：US12843985

    申请日：2010-07-27

    申请人： Boo Ho JUNG ,  Jun Ho LEE ,  Hyun Seok KIM ,  Yang Hee KIM

    发明人： Boo Ho JUNG ,  Jun Ho LEE ,  Hyun Seok KIM ,  Yang Hee KIM

    IPC分类号： H01L25/00

    CPC分类号： H01L25/00 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An output circuit of a semiconductor apparatus having two different types of decoupling capacitors is presented. The output circuit includes a first pad, a second pad, a main output unit and a decoupling capacitor region. The first and second pads are configured to respectively provide a power supply voltage and a ground voltage. The main output unit is coupled to the first and second pads. One end of the decoupling capacitor region is coupled to the first pad and the other end is coupled to the second pad. The decoupling capacitor region includes a first decoupling capacitor region spaced apart from a portion of the main output unit by a first distance, and a second decoupling capacitor region spaced apart from the main output unit by a second distance which is greater than the first distance.

    摘要翻译： 提出了具有两种不同类型的去耦电容器的半导体装置的输出电路。 输出电路包括第一焊盘，第二焊盘，主输出单元和去耦电容器区域。 第一和第二焊盘被配置为分别提供电源电压和接地电压。 主输出单元耦合到第一和第二焊盘。 去耦电容器区域的一端耦合到第一焊盘，另一端耦合到第二焊盘。 去耦电容器区域包括与主输出单元的一部分间隔开第一距离的第一去耦电容器区域和与主输出单元间隔开大于第一距离的第二距离的第二去耦电容器区域。

    Output circuit of semiconductor apparatus having two different types of decoupling capacitors
    9.
    发明授权
    Output circuit of semiconductor apparatus having two different types of decoupling capacitors 失效
    具有两种不同类型的去耦电容器的半导体装置的输出电路

    公开(公告)号：US08405454B2

    公开(公告)日：2013-03-26

    申请号：US12843985

    申请日：2010-07-27

    申请人： Boo Ho Jung ,  Jun Ho Lee ,  Hyun Seok Kim ,  Yang Hee Kim

    发明人： Boo Ho Jung ,  Jun Ho Lee ,  Hyun Seok Kim ,  Yang Hee Kim

    IPC分类号： H01L25/00

    CPC分类号： H01L25/00 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An output circuit of a semiconductor apparatus having two different types of decoupling capacitors is presented. The output circuit includes a first pad, a second pad, a main output unit and a decoupling capacitor region. The first and second pads are configured to respectively provide a power supply voltage and a ground voltage. The main output unit is coupled to the first and second pads. One end of the decoupling capacitor region is coupled to the first pad and the other end is coupled to the second pad. The decoupling capacitor region includes a first decoupling capacitor region spaced apart from a portion of the main output unit by a first distance, and a second decoupling capacitor region spaced apart from the main output unit by a second distance which is greater than the first distance.

    摘要翻译： 提出了具有两种不同类型的去耦电容器的半导体装置的输出电路。 输出电路包括第一焊盘，第二焊盘，主输出单元和去耦电容器区域。 第一和第二焊盘被配置为分别提供电源电压和接地电压。 主输出单元耦合到第一和第二焊盘。 去耦电容器区域的一端耦合到第一焊盘，另一端耦合到第二焊盘。 去耦电容器区域包括与主输出单元的一部分间隔开第一距离的第一去耦电容器区域和与主输出单元间隔开大于第一距离的第二距离的第二去耦电容器区域。

    Device test handler and method for operating the same
    10.
    发明授权
    Device test handler and method for operating the same 失效

    公开(公告)号：US06518745B2

    公开(公告)日：2003-02-11

    申请号：US09805214

    申请日：2001-03-14

    申请人： Seong Bong Kim ,  Yang Hee Kim ,  Won Hee Jo ,  Byoung Dae Lee ,  Hyun Soo Oh

    发明人： Seong Bong Kim ,  Yang Hee Kim ,  Won Hee Jo ,  Byoung Dae Lee ,  Hyun Soo Oh

    IPC分类号： G01R3102

    CPC分类号： G01R31/01

    摘要： A device test handler and a method for operating the same provide a significant reduction of the picking up and placing time periods, and reduce possible damage to the devices being tested. Devices and methods embodying the invention facilitate room temperature and high temperature testing within one device test handler to maximize testing efficiency. A test handler embodying the invention may include a pre-heater for pre-heating the devices on a loading shuttle as the loading shuttle passes to a test chamber. An indexing device in a test chamber of the device is used for successively transferring the devices from a loading shuttle to the test socket, and tested devices from the test socket to an unloading shuttle. Heat supply means may be provided for supplying a high temperature heat to the test chamber when the devices are required to be tested in a hot state. An unloading part having a plurality of trays movably fitted on the base is used to transfer devices from an unloading shuttle to output trays based on the testing results.