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    SEMICONDUCTOR MANUFACTURING APPARATUS
    2.
    发明申请
    SEMICONDUCTOR MANUFACTURING APPARATUS 有权
    半导体制造设备

    公开(公告)号：US20110140007A1

    公开(公告)日：2011-06-16

    申请号：US13059297

    申请日：2008-09-29

    申请人： Yoshiaki Ogino ,  Katsumi Kimura ,  Yasuhiro Iida ,  Kazuhiro Soga

    发明人： Yoshiaki Ogino ,  Katsumi Kimura ,  Yasuhiro Iida ,  Kazuhiro Soga

    IPC分类号： H01J37/10

    CPC分类号： B23K26/0732 ,  B23K26/066 ,  H01L21/02422 ,  H01L21/02532 ,  H01L21/02678 ,  H01L21/268

    摘要： To project a rectangular laser spot having a predetermined size and a high laser power density onto the surface of an object, a semiconductor manufacturing apparatus comprises a control unit for controlling power of a laser light source, an optical waveguide unit (1) including a core section (10) transmitting laser light and a clad section (11) covering the core section (10), and a lens (3) for forming the laser light output through the optical waveguide unit (1) into a laser spot having a predetermined shape, an output end surface (15) of the core section (10) has a rectangular shape with one side length of 1 μm to 20 μm and the other side length of 1 mm to 60 mm, and the laser source is set to make the power density of the laser spot output from the core section (10) to be 0.1 mW/μm2 or more.

    摘要翻译： 为了将具有预定尺寸和高激光功率密度的矩形激光光斑投影到物体的表面上，半导体制造装置包括用于控制激光源的功率的控制单元，包括芯的光波导单元（1） 发射激光的部分（10）和覆盖芯部（10）的包层部分（11），以及用于将通过光波导单元（1）输出的激光形成为具有预定形状的激光光斑的透镜（3） 芯部（10）的输出端面（15）具有一边长度为1μm〜20μm，另一侧长度为1mm〜60mm的矩形形状，激光源设定为 从芯部（10）输出的激光光斑的功率密度为0.1mW /μm2以上。

    DECODING DEVICE AND METHOD, RECEIVING DEVICE AND METHOD, AND PROGRAM
    3.
    发明申请
    DECODING DEVICE AND METHOD, RECEIVING DEVICE AND METHOD, AND PROGRAM 有权
    解码设备和方法，接收设备和方法以及程序

    公开(公告)号：US20090190695A1

    公开(公告)日：2009-07-30

    申请号：US12361199

    申请日：2009-01-28

    申请人： Takashi Yokokawa ,  Yasuhiro Iida ,  Toshiyuki Miyauchi ,  Takashi Hagiwara ,  Takanori Minamino ,  Naoya Haneda

    发明人： Takashi Yokokawa ,  Yasuhiro Iida ,  Toshiyuki Miyauchi ,  Takashi Hagiwara ,  Takanori Minamino ,  Naoya Haneda

    IPC分类号： H03D3/00

    CPC分类号： H04L27/3827 ,  H04L1/0054 ,  H04L1/208 ,  H04L7/042

    摘要： Disclosed herein is a decoding device that decodes demodulated data obtained by demodulating a quadrature modulated signal arising from digital modulation of a carrier and detects synchronization, the decoding device including, a decoder configured to decode first demodulated data that is the demodulated data obtained by demodulating the quadrature modulated signal and is composed of in-phase axis data and quadrature axis data, and decode second demodulated data obtained by interchanging the in-phase axis data and the quadrature axis data of the first demodulated data, and a synchronization detector configured to detect a boundary between predetermined information symbol sequences from first decoded data obtained by decoding the first demodulated data and detect the boundary from second decoded data obtained by decoding the second demodulated data, the synchronization detector selecting and outputting one of the first decoded data and the second decoded data based on a result of the detection of the boundary.

    摘要翻译： 本文公开了一种解码装置，其对通过解调由载波的数字调制产生的正交调制信号而获得的解调数据进行解码，并检测同步，该解码装置包括：解码器，被配置为对作为解调数据的第一解调数据进行解码， 正交调制信号，并且由同相轴数据和正交轴数据组成，并且对通过交换同相轴数据和第一解调数据的正交轴数据而获得的第二解调数据进行解码，以及同步检测器， 从通过对第一解调数据进行解码而获得的第一解码数据的预定信息符号序列之间的边界，并通过对第二解调数据进行解码获得的第二解码数据检测边界，同步检测器选择并输出第一解码数据和第二解码数据之一 基于de的结果 切割边界。

    Decoding apparatus, decoding method, and program to decode low density parity check codes
    5.
    发明授权
    Decoding apparatus, decoding method, and program to decode low density parity check codes 有权
    解码装置，解码方法和程序来解码低密度奇偶校验码

    公开(公告)号：US07299397B2

    公开(公告)日：2007-11-20

    申请号：US10521054

    申请日：2004-04-19

    申请人： Takashi Yokokawa ,  Toshiyuki Miyauchi ,  Yasuhiro Iida

    发明人： Takashi Yokokawa ,  Toshiyuki Miyauchi ,  Yasuhiro Iida

    IPC分类号： H03M13/00

    CPC分类号： H03M13/1168 ,  H03M13/11 ,  H03M13/1114 ,  H03M13/1134 ,  H03M13/1137 ,  H03M13/1145 ,  H03M13/1188 ,  H03M13/6505 ,  H03M13/6566 ,  H03M13/6577

    摘要： The present invention relates to a decoding apparatus and a decoding method for realizing the decoding of LDPC codes, in which, while the circuit scale is suppressed, the operating frequency can be suppressed within a sufficiently feasible range, and control of memory access can be performed easily, and to a program therefor. A check matrix of LDPC codes is formed by a combination of a (P×P) unit matrix, a matrix in which one to several 1s of the unit matrix are substituted with 0, a matrix in which they are cyclically shifted, a matrix, which is the sum of two or more of them, and a (P×P) 0-matrix. A check node calculator 313 simultaneously performs p check node calculations. A variable node calculator 319 simultaneously performs p variable node calculations.

    摘要翻译： 本发明涉及一种用于实现LDPC码的解码的解码装置和解码方法，其中在抑制电路规模的同时，可以在足够可行的范围内抑制工作频率，并且可以执行存储器访问的控制 很容易，也是一个程序。 LDPC码的校验矩阵通过（PxP）单位矩阵，单位矩阵中的一个到数个1被0替换的矩阵，它们被循环移位的矩阵的组合形成矩阵，矩阵是 它们中的两个或更多个的和，以及（PxP）0矩阵。 校验节点计算器313同时执行p校验节点计算。 变量节点计算器319同时执行p变量节点计算。

    Decoding apparatus, decoding method, and program to decode low density parity check codes
    8.
    再颁专利
    Decoding apparatus, decoding method, and program to decode low density parity check codes 有权
    解码装置，解码方法和程序来解码低密度奇偶校验码

    公开(公告)号：USRE44420E1

    公开(公告)日：2013-08-06

    申请号：US12611227

    申请日：2004-04-19

    申请人： Takashi Yokokawa ,  Toshiyuki Miyauchi ,  Yasuhiro Iida

    发明人： Takashi Yokokawa ,  Toshiyuki Miyauchi ,  Yasuhiro Iida

    IPC分类号： H03M13/00

    CPC分类号： H03M13/1168 ,  H03M13/11 ,  H03M13/1114 ,  H03M13/1134 ,  H03M13/1137 ,  H03M13/1145 ,  H03M13/1188 ,  H03M13/6505 ,  H03M13/6566 ,  H03M13/6577

    摘要： The present invention relates to a decoding apparatus and a decoding method for realizing the decoding of LDPC codes, in which, while the circuit scale is suppressed, the operating frequency can be suppressed within a sufficiently feasible range, and control of memory access can be performed easily, and to a program therefor. A check matrix of LDPC codes is formed by a combination of a (P×P) unit matrix, a matrix in which one to several 1s of the unit matrix are substituted with 0, a matrix in which they are cyclically shifted, a matrix, which is the sum of two or more of them, and a (P×P) 0-matrix. A check node calculator 313 simultaneously performs p check node calculations. A variable node calculator 319 simultaneously performs p variable node calculations.

    摘要翻译： 本发明涉及一种用于实现LDPC码的解码的解码装置和解码方法，其中在抑制电路规模的同时，可以在足够可行的范围内抑制工作频率，并且可以执行存储器访问的控制 很容易，也是一个程序。 LDPC码的校验矩阵通过（P×P）单位矩阵，单位矩阵中的1至数个1被0替换的矩阵，循环移位的矩阵，矩阵， 它们是两个或更多个的和，（P×P）0矩阵的和。 校验节点计算器313同时执行p校验节点计算。 变量节点计算器319同时执行p变量节点计算。

    Reception device, reception method and program
    9.
    发明授权
    Reception device, reception method and program 有权
    接收设备，接收方式和程序

    公开(公告)号：US08078127B2

    公开(公告)日：2011-12-13

    申请号：US12340975

    申请日：2008-12-22

    申请人： Takanori Minamino ,  Yasuhiro Iida ,  Ryo Hasegawa

    发明人： Takanori Minamino ,  Yasuhiro Iida ,  Ryo Hasegawa

    IPC分类号： H04B7/00

    CPC分类号： H03G3/3052

    摘要： A reception device includes: an AGC circuit adapted to control the amplitude of a receive signal; a correction circuit adapted to correct the flutter component in the output signal of the AGC circuit; a synchronization circuit adapted to establish synchronization with the signal whose flutter component has been corrected by the correction circuit; and an equalization circuit adapted to perform an equalization process based on the signal with which synchronization has been established by the synchronization circuit and output the equalized signal, wherein the correction circuit includes a detection circuit, an IIR filter, a gain circuit, a flutter component correction circuit, and a gain control circuit.

    摘要翻译： 接收装置包括：AGC电路，适于控制接收信号的幅度; 校正电路，其适于校正AGC电路的输出信号中的颤振分量; 同步电路，其适于与所述校正电路对其颤振分量进行了校正的信号建立同步; 以及均衡电路，其适于基于同步电路已经建立同步的信号执行均衡处理，并输出均衡信号，其中校正电路包括检测电路，IIR滤波器，增益电路，颤振分量 校正电路和增益控制电路。