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    Semiconductor material having bipolar transistor structure and semiconductor device using same
    1.
    发明申请
    Semiconductor material having bipolar transistor structure and semiconductor device using same 审中-公开
    具有双极晶体管结构的半导体材料和使用其的半导体器件

    公开(公告)号：US20060180833A1

    公开(公告)日：2006-08-17

    申请号：US10539006

    申请日：2003-12-16

    申请人： Akira Inoue ,  Masahiko Hata ,  Yasuyuki Kurita

    发明人： Akira Inoue ,  Masahiko Hata ,  Yasuyuki Kurita

    IPC分类号： H01L31/109

    CPC分类号： H01L29/7371 ,  H01L29/0821

    摘要： In an epitaxial substrate (20) comprising a collector layer (22), a base layer (23) and an emitter layer (24) formed on a semi-insulating GaAs substrate (21), a hole barrier layer (22C) is provided in the collector layer (22) to prevent influx of holes from the base layer (23), whereby the flow of collector current is suppressed when the collector current density rises and electron velocity is saturated, suppressing thermal runaway of the collector current without a ballast resistance or the like. Also, thermal runaway of the collector current is suppressed by providing an additional layer (2C) for generating, in the conduction band, an electron barrier by means of electrons accumulated in the collector layer (2) when the collector current density rises.

    摘要翻译： 在包括集电极层（22），形成在半绝缘GaAs衬底（21）上的基极层（23）和发射极层（24））的外延衬底（20）中，提供了空穴阻挡层（22C） 在集电体层（22）中，为了防止从基底层（23）流入空穴，由此当集电极电流密度上升，电子速度饱和时，集电极电流的流动受到抑制，抑制了没有镇流器的集电极电流的热失控 电阻等。 此外，通过设置用于在集电极电流密度上升时通过积聚在集电极层（2）中的电子在导带中产生电子势垒的附加层（2C）来抑制集电极电流的热失控。

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
    6.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE 审中-公开
    半导体器件及制造半导体器件的方法

    公开(公告)号：US20110108885A1

    公开(公告)日：2011-05-12

    申请号：US12933356

    申请日：2009-03-18

    申请人： Hiroyuki Sazawa ,  Naohiro Nishikawa ,  Yasuyuki Kurita ,  Masahiko Hata

    发明人： Hiroyuki Sazawa ,  Naohiro Nishikawa ,  Yasuyuki Kurita ,  Masahiko Hata

    IPC分类号： H01L29/78 ,  H01L21/20

    CPC分类号： H01L29/7787 ,  H01L29/1054 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/66522 ,  H01L29/78

    摘要： The object of the present invention is to increase channel current density while a GaN-based field effect transistor operates in a normally-off mode. Provided is a semiconductor device comprising a group 3-5 compound semiconductor channel layer containing nitrogen, an electron supply layer that supplies electrons to the channel layer, a semiconductor layer that is formed on a side of the electron supply layer opposite the side facing the channel layer and that is an intrinsic or n-type group 3-5 compound semiconductor containing nitrogen, and a control electrode that is formed to contact the semiconductor layer or formed with an intermediate layer interposed between itself and the semiconductor layer.

    摘要翻译： 本发明的目的是增加沟道电流密度，而GaN系场效应晶体管以常关状态工作。 提供了一种半导体器件，其包括含有氮的组3-5化合物半导体沟道层，向沟道层提供电子的电子供给层，形成在电子供给层的与沟道侧相对的一侧上的半导体层 并且是含有氮的固有或n型组3-5化合物半导体，以及形成为与半导体层接触或形成有介于其自身与半导体层之间的中间层的控制电极。

    3-5 Group compound semiconductor and light emitting device
    7.
    发明授权
    3-5 Group compound semiconductor and light emitting device 失效
    3-5组化合物半导体和发光器件

    公开(公告)号：US06806502B2

    公开(公告)日：2004-10-19

    申请号：US09987660

    申请日：2001-11-15

    申请人： Yasushi Iyechika ,  Yoshihiko Tsuchida ,  Yasuyuki Kurita

    发明人： Yasushi Iyechika ,  Yoshihiko Tsuchida ,  Yasuyuki Kurita

    IPC分类号： H01L3112

    CPC分类号： H01L33/325 ,  Y10S438/933 ,  Y10S438/936

    摘要： Provide is a 3-5 group compound semiconductor having a concentration of a p-type dopant of 1×1017 cm− or more and 1×1021 cm−3 or less, which can be laminated to control the carrier concentration of an InGaAlN-type mixed crystal in a low range with high reproducibility. Also provided is a 3-5 group compound semiconductor in which the carrier concentration of an InGaAlN-type mixed crystal is controlled in a low range with high reproducibility, and a light emitting device having high light emitting efficiency.

    摘要翻译： 提供具有1×10 17 cm -3以上且1×10 21 cm -3以下的p型掺杂剂浓度的3-5组化合物半导体，其可以层压以控制载体 浓度高的InGaAlN型混合晶体，重现性高。 还提供了以高重现性将InGaAlN型混晶体的载流子浓度控制在低范围内的3-5组化合物半导体和具有高发光效率的发光器件。

    HETERO JUNCTION BIPOLAR TRANSISTOR
    8.
    发明申请
    HETERO JUNCTION BIPOLAR TRANSISTOR 审中-公开
    异质结双极晶体管

    公开(公告)号：US20100200894A1

    公开(公告)日：2010-08-12

    申请号：US12670215

    申请日：2008-07-10

    申请人： Yasuyuki Kurita ,  Noboru Fukuhara

    发明人： Yasuyuki Kurita ,  Noboru Fukuhara

    IPC分类号： H01L29/73

    CPC分类号： H01L29/737 ,  H01L29/0817 ,  H01L29/201 ,  H01L29/205 ,  H01L29/7304 ,  H01L29/7371

    摘要： An energy level Ec in a vicinity of an interface between a graded layer 1G a ballast resistor 1R is smoothly continuous. This is because an n-type impurity concentration CION in the vicinity of the interface is increased and thus an ionized donor (having a positive charge) exists in the vicinity of the interface. That is, the donor ion cancels out a spike-like potential barrier φBARRIER protruding in the negative direction of the potential in the vicinity of this interface. Accordingly, the resistance value of an HBT at room temperature decreases and the high frequency characteristics are improved.

    摘要翻译： 梯级层1G之间的界面附近的镇流电阻Ec平稳地连续。 这是因为界面附近的n型杂质浓度CION增加，因此在界面附近存在电离供体（具有正电荷）。 也就是说，供体离子抵消在该界面附近的电势的负方向上突出的尖状势垒和障碍物。 因此，HBT在室温下的电阻值降低，高频特性提高。