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公开(公告)号:US20070278696A1
公开(公告)日:2007-12-06
申请号:US11636986
申请日:2006-12-12
申请人: Yung-Li Lu , Cheng-Yin Lee , Ying-Tsai Yeh
发明人: Yung-Li Lu , Cheng-Yin Lee , Ying-Tsai Yeh
IPC分类号: H01L23/52
CPC分类号: H01L23/3121 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L25/105 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73253 , H01L2224/73265 , H01L2225/06575 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2225/1088 , H01L2924/00014 , H01L2924/181 , H01L2924/1815 , H01L2924/19107 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: The present invention relates to a stackable semiconductor package including a first substrate, a chip, a low modules film, a second substrate, a plurality of first wires, and a first molding compound. The chip is disposed on the first substrate. The low modules film is disposed on the chip. The second substrate is disposed on the low modules film. The area of the low modules film is adjusted according to the area of the second substrate, so as to support the second substrate. The first wires electrically connect the first substrate and the second substrate. Some pads of the second substrate are exposed outside the first molding compound. Therefore, the overhang portion of the second substrate will not shake or sway during a wire bonding process, and the area of the second substrate can be increased to receive more devices disposed thereon. In addition, the thickness of the second substrate can be reduced, so as to reduce the overall thickness of the stackable semiconductor package.
摘要翻译: 本发明涉及一种包括第一基板,芯片,低模块薄膜,第二基板,多个第一导线和第一模塑料的可堆叠半导体封装。 芯片设置在第一基板上。 低模块薄膜设置在芯片上。 第二基板设置在低模块膜上。 根据第二基板的面积来调整低模块膜的面积,以支撑第二基板。 第一导线电连接第一基板和第二基板。 第二基板的一些焊盘暴露在第一模塑料的外部。 因此,第二基板的突出部分在引线接合工艺期间不会摇动或摆动,并且可以增加第二基板的面积以接收更多设置在其上的装置。 此外,可以减小第二基板的厚度,从而减小可堆叠半导体封装的整体厚度。
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公开(公告)号:US20070252284A1
公开(公告)日:2007-11-01
申请号:US11636975
申请日:2006-12-12
申请人: Po-Ching Su , Cheng-Yin Lee , Ying-Tsai Yeh , Gwo-Liang Weng
发明人: Po-Ching Su , Cheng-Yin Lee , Ying-Tsai Yeh , Gwo-Liang Weng
IPC分类号: H01L23/52
CPC分类号: H01L23/3107 , H01L24/48 , H01L24/73 , H01L25/03 , H01L25/105 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73215 , H01L2224/73265 , H01L2225/1023 , H01L2225/1041 , H01L2225/1052 , H01L2225/1058 , H01L2225/1088 , H01L2924/00014 , H01L2924/181 , H01L2924/1815 , H01L2924/19107 , H01L2924/00 , H01L2224/48145 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: The present invention relates to a stackable semiconductor package. The stackable semiconductor package includes a first substrate, a chip, a first molding compound, a second substrate, a plurality of first wires, and a second molding compound. The chip is disposed on the first substrate. The second substrate is disposed on the first molding compound. The area of the first molding compound is adjusted according to the area of the second substrate, so as to support the second substrate. The first wires electrically connect the first substrate and the second substrate. Some pads of the second substrate are exposed outside the second molding compound. Therefore, the second substrate will not shake or sway during a wire bonding process, and the area of the second substrate can be increased to receive more devices disposed thereon.
摘要翻译: 本发明涉及一种可堆叠半导体封装。 可堆叠半导体封装包括第一基板,芯片,第一模塑料,第二基板,多个第一布线和第二模塑料。 芯片设置在第一基板上。 第二基板设置在第一模塑料上。 根据第二基板的面积调整第一模塑料的面积,以支撑第二基板。 第一导线电连接第一基板和第二基板。 第二基板的一些焊盘暴露在第二模塑料的外部。 因此,第二基板在引线接合工艺期间不会摇动或摆动,并且可以增加第二基板的面积以接收更多设置在其上的装置。
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公开(公告)号:US07049689B2
公开(公告)日:2006-05-23
申请号:US10947176
申请日:2004-09-23
申请人: Ying-Tsai Yeh , Chih-Huang Chang , Yung Li Lu
发明人: Ying-Tsai Yeh , Chih-Huang Chang , Yung Li Lu
IPC分类号: H01L31/0203 , H01L23/02 , H01L23/48 , H01L23/52 , H01L23/40
CPC分类号: G06K9/00053 , H01L27/14618 , H01L2224/16145 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/15311 , H01L2924/00014
摘要: A chip on glass package. A glass substrate has a top surface and a corresponding bottom surface. A plurality of chips are flip-chip mounted on the top surface of the glass substrate. The bottom surface of the glass substrate is secured to and electrically connected with a carrier. An encapsulation material is formed around the glass substrate to seal the chips. The encapsulation material has a cavity to expose the contact area of the top surface of the glass substrate. Therefore the chip on glass package is to possess a better protection and electrical connection of the glass substrate.
摘要翻译: 玻璃包装芯片。 玻璃基板具有顶表面和相应的底表面。 多个芯片被倒装安装在玻璃基板的顶表面上。 玻璃基板的底面被固定并与载体电连接。 在玻璃基板周围形成密封材料以密封芯片。 封装材料具有用于暴露玻璃基板的顶表面的接触面积的空腔。 因此,玻璃封装上的芯片具有更好的玻璃基板的保护和电连接。
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公开(公告)号:US07187067B2
公开(公告)日:2007-03-06
申请号:US11163869
申请日:2005-11-02
申请人: Gwo-Liang Weng , Yung-Li Lu , Ying-Tsai Yeh
发明人: Gwo-Liang Weng , Yung-Li Lu , Ying-Tsai Yeh
IPC分类号: H01L23/02
CPC分类号: H01L27/14618 , G06K9/00013 , H01L24/73 , H01L27/14636 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/8592 , H01L2924/10156 , H01L2924/1815 , H01L2924/00014 , H01L2924/00012
摘要: A sensor chip for defining an exposed molding region is disclosed. The sensor chip includes a semiconductor chip and a metal dam bar protruding from the active surface of the semiconductor chip. The active surface of the semiconductor chip includes a sensing region and at least one bonding pad is disposed on the active surface. The metal dam bar separates the sensing region and the bonding pad to prevent contamination of the sensing region by the mold flash. Preferably, a step is formed on the periphery of the active surface of the semiconductor chip, such that the semiconductor chip includes a T-shaped profile. Additionally, the metal dam bar is extended to the step to form an enclosed ring thereby effectively defining an exposed molding region that contains the sensing region.
摘要翻译: 公开了一种用于限定暴露的成型区域的传感器芯片。 传感器芯片包括从半导体芯片的有源表面突出的半导体芯片和金属阻挡条。 半导体芯片的有源表面包括感测区域,并且至少一个焊盘设置在有源表面上。 金属阻挡条分隔感测区域和接合焊盘,以防止模具闪光灯对感测区域的污染。 优选地,在半导体芯片的有源表面的周围形成台阶,使得半导体芯片包括T形轮廓。 此外,金属阻挡杆延伸到台阶以形成封闭的环,从而有效地限定包含感测区域的暴露的模制区域。
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公开(公告)号:US20060091515A1
公开(公告)日:2006-05-04
申请号:US11163869
申请日:2005-11-02
申请人: Gwo-Liang Weng , Yung-Li Lu , Ying-Tsai Yeh
发明人: Gwo-Liang Weng , Yung-Li Lu , Ying-Tsai Yeh
IPC分类号: H01L23/02
CPC分类号: H01L27/14618 , G06K9/00013 , H01L24/73 , H01L27/14636 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/8592 , H01L2924/10156 , H01L2924/1815 , H01L2924/00014 , H01L2924/00012
摘要: A sensor chip for defining an exposed molding region is disclosed. The sensor chip includes a semiconductor chip and a metal dam bar protruding from the active surface of the semiconductor chip. The active surface of the semiconductor chip includes a sensing region and at least one bonding pad is disposed on the active surface. The metal dam bar separates the sensing region and the bonding pad to prevent contamination of the sensing region by the mold flash. Preferably, a step is formed on the periphery of the active surface of the semiconductor chip, such that the semiconductor chip includes a T-shaped profile. Additionally, the metal dam bar is extended to the step to form an enclosed ring thereby effectively defining an exposed molding region that contains the sensing region.
摘要翻译: 公开了一种用于限定暴露的成型区域的传感器芯片。 传感器芯片包括从半导体芯片的有源表面突出的半导体芯片和金属阻挡条。 半导体芯片的有源表面包括感测区域,并且至少一个焊盘设置在有源表面上。 金属阻挡条分隔感测区域和接合焊盘,以防止模具闪光灯对感测区域的污染。 优选地,在半导体芯片的有源表面的周围形成台阶,使得半导体芯片包括T形轮廓。 此外,金属阻挡杆延伸到台阶以形成封闭的环,从而有效地限定包含感测区域的暴露的模制区域。
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公开(公告)号:US20050062142A1
公开(公告)日:2005-03-24
申请号:US10947176
申请日:2004-09-23
申请人: Ying-Tsai Yeh , Chih-Huang Chang , Yung Lu
发明人: Ying-Tsai Yeh , Chih-Huang Chang , Yung Lu
IPC分类号: G06K9/00 , H01L21/44 , H01L23/14 , H01L27/146
CPC分类号: G06K9/00053 , H01L27/14618 , H01L2224/16145 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/15311 , H01L2924/00014
摘要: A chip on glass package. A glass substrate has a top surface and a corresponding bottom surface. A plurality of chips are flip-chip mounted on the top surface of the glass substrate. The bottom surface of the glass substrate is secured to and electrically connected with a carrier. An encapsulation material is formed around the glass substrate to seal the chips. The encapsulation material has a cavity to expose the contact area of the top surface of the glass substrate. Therefore the chip on glass package is to possess a better protection and electrical connection of the glass substrate.
摘要翻译: 玻璃包装芯片。 玻璃基板具有顶表面和相应的底表面。 多个芯片被倒装安装在玻璃基板的顶表面上。 玻璃基板的底面被固定并与载体电连接。 在玻璃基板周围形成密封材料以密封芯片。 封装材料具有用于暴露玻璃基板的顶表面的接触面积的空腔。 因此,玻璃封装上的芯片具有更好的玻璃基板的保护和电连接。
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公开(公告)号:US07432127B2
公开(公告)日:2008-10-07
申请号:US11464296
申请日:2006-08-14
申请人: Yung-Li Lu , Gwo-Liang Weng , Ying-Tsai Yeh
发明人: Yung-Li Lu , Gwo-Liang Weng , Ying-Tsai Yeh
CPC分类号: H01L24/32 , H01L24/73 , H01L24/83 , H01L2224/27013 , H01L2224/2919 , H01L2224/32057 , H01L2224/32225 , H01L2224/48227 , H01L2224/73257 , H01L2224/73265 , H01L2224/83051 , H01L2224/8314 , H01L2224/83385 , H01L2224/8385 , H01L2224/8592 , H01L2924/01033 , H01L2924/01047 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/14 , H01L2924/1815 , H01L2924/00 , H01L2924/00012
摘要: A chip package and a package process thereof are provided. The chip package comprises a package substrate, a chip, a plurality of spacers, an adhesive layer, and a plurality of wires. The package substrate has a carrying surface. The chip is disposed on the carrying surface. The spacers are formed between the chip and the carrying surface to maintain an interval between the chip and the package substrate. The adhesive layer is disposed between the chip and carrying surface to encapsulate the spacers. The chip is electrically connected to the package substrate via the wires.
摘要翻译: 提供了芯片封装及其封装工艺。 芯片封装包括封装基板,芯片,多个间隔物,粘合剂层和多根导线。 封装基板具有承载表面。 芯片设置在承载表面上。 间隔件形成在芯片和承载表面之间以保持芯片和封装衬底之间的间隔。 粘合剂层设置在芯片和载体表面之间以封装间隔物。 芯片通过导线与封装基板电连接。
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公开(公告)号:US20070042534A1
公开(公告)日:2007-02-22
申请号:US11464296
申请日:2006-08-14
申请人: Yung-Li Lu , Gwo-Liang Weng , Ying-Tsai Yeh
发明人: Yung-Li Lu , Gwo-Liang Weng , Ying-Tsai Yeh
IPC分类号: H01L21/00
CPC分类号: H01L24/32 , H01L24/73 , H01L24/83 , H01L2224/27013 , H01L2224/2919 , H01L2224/32057 , H01L2224/32225 , H01L2224/48227 , H01L2224/73257 , H01L2224/73265 , H01L2224/83051 , H01L2224/8314 , H01L2224/83385 , H01L2224/8385 , H01L2224/8592 , H01L2924/01033 , H01L2924/01047 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/14 , H01L2924/1815 , H01L2924/00 , H01L2924/00012
摘要: A chip package and a package process thereof are provided. The chip package comprises a package substrate, a chip, a plurality of spacers, an adhesive layer, and a plurality of wires. The package substrate has a carrying surface. The chip is disposed on the carrying surface. The spacers are formed between the chip and the carrying surface to maintain an interval between the chip and the package substrate. The adhesive layer is disposed between the chip and carrying surface to encapsulate the spacers. The chip is electrically connected to the package substrate via the wires.
摘要翻译: 提供了芯片封装及其封装工艺。 芯片封装包括封装基板,芯片,多个间隔物,粘合剂层和多根导线。 封装基板具有承载表面。 芯片设置在承载表面上。 间隔件形成在芯片和承载表面之间以保持芯片和封装衬底之间的间隔。 粘合剂层设置在芯片和载体表面之间以封装间隔物。 芯片通过导线与封装基板电连接。
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公开(公告)号:US07122757B2
公开(公告)日:2006-10-17
申请号:US10868496
申请日:2004-06-14
申请人: Shih-Chang Lee , Cheng-Yin Lee , Yung-Li Lu , Ying-Tsai Yeh , Pei-Chi Lin
发明人: Shih-Chang Lee , Cheng-Yin Lee , Yung-Li Lu , Ying-Tsai Yeh , Pei-Chi Lin
IPC分类号: H03K17/975
CPC分类号: H03K17/975 , H03K17/98 , Y10T428/30
摘要: A contact sensor package has a substrate, a film, a sealant and a plurality of contact sensors disposed on the substrate. The contact sensors are disposed within the enclosed space defined by the substrate, the film and the sealant. The contact sensor package further has at least a ground conductive trace formed on the substrate and an electrostatic charge dissipation layer formed on a surface of the film and electrically connected to the ground conductive trace. The electrostatic charge dissipation layer has an upper surface that serves as a contact surface for a detecting a contact work-piece.
摘要翻译: 接触传感器封装具有衬底,膜,密封剂和设置在衬底上的多个接触传感器。 接触传感器设置在由基板,膜和密封剂限定的封闭空间内。 接触传感器封装还具有至少形成在基板上的接地导电迹线和形成在膜的表面上并电连接到接地导电迹线的静电电荷耗散层。 静电电荷耗散层具有作为用于检测接触工件的接触面的上表面。
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公开(公告)号:US20050274597A1
公开(公告)日:2005-12-15
申请号:US10868496
申请日:2004-06-14
申请人: Shih-Chang Lee , Cheng-Yin Lee , Yung-Li Lu , Ying-Tsai Yeh , Pei-Chi Lin
发明人: Shih-Chang Lee , Cheng-Yin Lee , Yung-Li Lu , Ying-Tsai Yeh , Pei-Chi Lin
IPC分类号: H03K17/975
CPC分类号: H03K17/975 , H03K17/98 , Y10T428/30
摘要: A contact sensor package has a substrate, a film, a sealant and a plurality of contact sensors disposed on the substrate. The contact sensors are disposed within the enclosed space defined by the substrate, the film and the sealant. The contact sensor package further has at least a ground conductive trace formed on the substrate and an electrostatic charge dissipation layer formed on a surface of the film and electrically connected to the ground conductive trace. The electrostatic charge dissipation layer has an upper surface that serves as a contact surface for a detecting a contact work-piece.
摘要翻译: 接触传感器封装具有衬底,膜,密封剂和设置在衬底上的多个接触传感器。 接触传感器设置在由基板,膜和密封剂限定的封闭空间内。 接触传感器封装还具有至少形成在基板上的接地导电迹线和形成在膜的表面上并电连接到接地导电迹线的静电电荷耗散层。 静电电荷耗散层具有作为用于检测接触工件的接触面的上表面。
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