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    METHOD AND APPARATUS FOR TIMING ADJUSTMENT
    1.
    发明申请
    METHOD AND APPARATUS FOR TIMING ADJUSTMENT 有权
    用于时序调整的方法和装置

    公开(公告)号：US20120081973A1

    公开(公告)日：2012-04-05

    申请号：US13311318

    申请日：2011-12-05

    申请人： Yoshihiro KISHIMOTO ,  Yuji Sekiguchi ,  Yoichiro Miki

    发明人： Yoshihiro KISHIMOTO ,  Yuji Sekiguchi ,  Yoichiro Miki

    IPC分类号： G11C7/10

    CPC分类号： G11C7/222 ,  G11C7/10 ,  G11C7/1051 ,  G11C7/106 ,  G11C7/1066 ,  G11C7/1078 ,  G11C7/1093 ,  G11C7/22

    摘要： A strobe signal from a memory is delayed through delay circuits of a strobe delay selection section, thus obtaining a plurality of delayed strobe signals. A strobe latch section produces check data in synchronism with each of the delayed strobe signals, and a system latch section latches, with a system clock, check data latched by the strobe latch section. Based on a comparison by an expected value comparison section and a determination by a delay determination section, the optimal strobe signal with the optimal delay is selected from among the delayed strobe signals produced in the strobe delay selection section. Then, data from the memory is delayed through delay circuits in a data delay selection section, thus obtaining a plurality of delayed data, and the optimal data with the optimal delay is selected from among the plurality of delayed data based on the comparison by the expected value comparison section and the determination by the delay determination section.

    摘要翻译： 来自存储器的选通信号通过选通延迟选择部分的延迟电路被延迟，从而获得多个延迟的选通信号。 选通锁存部分与延迟的选通信号中的每一个同步地产生检查数据，并且系统锁存部分用系统时钟锁存由选通锁存部分锁存的数据。 基于期望值比较部分的比较和延迟确定部分的确定，从选通延迟选择部分中产生的延迟选通信号中选择具有最佳延迟的最佳选通信号。 然后，通过数据延迟选择部分中的延迟电路来延迟来自存储器的数据，从而获得多个延迟数据，并且基于预期的比较，从多个延迟数据中选择具有最佳延迟的最佳数据 值比较部分和延迟确定部分的确定。

    Memory interface device and memory address generation device
    2.
    发明授权
    Memory interface device and memory address generation device 有权
    存储器接口设备和存储器地址生成设备

    公开(公告)号：US06453394B2

    公开(公告)日：2002-09-17

    申请号：US09165785

    申请日：1998-10-02

    申请人： Yoichiro Miki ,  Masahiro Tani ,  Kazuki Ninomiya ,  Naoya Tokunaga ,  Kenta Sokawa ,  Hiroshi Miyaguchi ,  Yuji Yaguchi ,  Tsuyoshi Akiyama ,  Kenya Adachi

    发明人： Yoichiro Miki ,  Masahiro Tani ,  Kazuki Ninomiya ,  Naoya Tokunaga ,  Kenta Sokawa ,  Hiroshi Miyaguchi ,  Yuji Yaguchi ,  Tsuyoshi Akiyama ,  Kenya Adachi

    IPC分类号： G06F1200

    CPC分类号： G06F9/345 ,  G06F13/1673 ,  H04N19/423 ,  H04N19/61

    摘要： A memory interface device of the present invention includes: an input buffer including a plurality of input areas; an output buffer including 8 plurality of output areas; and a control section for controlling the input buffer, the output buffer and a single port memory. The control section controls the input buffer and the single port memory so as to transfer a signal stored in one of the input areas of the input buffer to the single port memory while storing an input signal in another one of the input areas of the input buffer. The control section controls the output buffer and the single port memory so as to output as an output signal a signal stored in one of the output areas of the output buffer while transferring a signal stored in the single port memory to another one of the output areas of the output buffer.

    摘要翻译： 本发明的存储器接口装置包括：输入缓冲器，包括多个输入区域; 包括8个多个输出区域的输出缓冲器; 以及用于控制输入缓冲器，输出缓冲器和单端口存储器的控制部分。 控制部分控制输入缓冲器和单端口存储器，以将存储在输入缓冲器的一个输入区域中的信号传送到单端口存储器，同时将输入信号存储在输入缓冲器的另一个输入区域中 。 控制部分控制输出缓冲器和单端口存储器，以将存储在单端口存储器中的信号传送到输出区域中的另一个输出端，从而作为输出信号输出存储在输出缓冲器的一个输出区域中的信号 的输出缓冲区。

    Video signal noise reduction apparatus with variable S/N improving amount
    3.
    发明授权
    Video signal noise reduction apparatus with variable S/N improving amount 失效
    具有可变S / N改善量的视频信号降噪装置

    公开(公告)号：US6094233A

    公开(公告)日：2000-07-25

    申请号：US905155

    申请日：1997-08-01

    申请人： Yoichiro Miki ,  Masanori Hamada ,  Atsushi Ishizu ,  Masatoshi Nakano

    发明人： Yoichiro Miki ,  Masanori Hamada ,  Atsushi Ishizu ,  Masatoshi Nakano

    IPC分类号： H04N5/21 ,  H04N9/64 ,  H04N5/213

    CPC分类号： H04N5/21 ,  H04N9/646

    摘要： In a noise reducer whose S/N improving amount is variable, as to such a region where image quality deterioration caused by the noise reducer becomes relatively apparent, and both a luminance level and a chroma level are low, the S/N improving amount thereof is decreased. To the contrary, as to such a picture having a dark high frequency range component and a small movement component, no control is made of the S/N improving amount by the above-described luminance level and chroma level, but the normal S/N improvement is sufficiently carried out.

    摘要翻译： 在S / N改善量可变的降噪器中，对于由降噪器引起的图像质量劣化的区域变得相对明显，并且亮度水平和色度水平都低的S / N改善量 减少。 相反，对于具有暗的高频范围分量和小的移动分量的这种图像，不能通过上述亮度级和色度水平来控制S / N改善量，而是通常的S / N 充分进行改善。

    Television receiver and signal processing apparatus
    4.
    发明授权
    Television receiver and signal processing apparatus 失效
    电视接收机和信号处理装置

    公开(公告)号：US5986716A

    公开(公告)日：1999-11-16

    申请号：US805806

    申请日：1997-02-25

    申请人： Kenta Sokawa ,  Yoichiro Miki ,  Takashi Yamaguchi

    发明人： Kenta Sokawa ,  Yoichiro Miki ,  Takashi Yamaguchi

    IPC分类号： H04N5/46 ,  H04N7/00 ,  H04N5/44

    CPC分类号： H04N5/44

    摘要： A television receiver (a signal processing apparatus) equipped with a microprocessor unit, wherein a high speed processing, such as video decoding, is performed by a programmable operation circuit, and a low speed processing, such as control processing, synchronous processing, or deflection processing, is performed by the microprocessor unit.

    摘要翻译： 配备有微处理器单元的电视接收机（信号处理装置），其中通过可编程操作电路执行诸如视频解码的高速处理，以及诸如控制处理，同步处理或偏转之类的低速处理 处理，由微处理器单元执行。

    Color difference signal IP conversion method
    5.
    发明授权
    Color difference signal IP conversion method 失效
    色差信号IP转换方法

    公开(公告)号：US08164687B2

    公开(公告)日：2012-04-24

    申请号：US12067576

    申请日：2007-06-25

    申请人： Yoichiro Miki

    发明人： Yoichiro Miki

    IPC分类号： H04N7/01

    CPC分类号： H04N7/012 ,  H04N7/0137

    摘要： An output of a conventional color-difference inter-field interpolating unit (10) and an output obtained by a color-difference 4:2:0 inter-field interpolating unit (11) and a color-difference intra-field line interpolating unit (12) as a progressive signal through inter-field interpolation by changing a 4:2:2 color-difference signal into a 4:2:0 color-difference signal are switched by a color-difference static image processing method selecting/mixing unit (14) in accordance with an output or the like of a detecting unit (13) for detecting a characteristic of an image signal. Thus, it is possible to realize color-difference signal IP conversion static image processing in which degradation of a correct 4:2:2 color-difference signal is suppressed and jaggy is reduced with respect to a 4:2:2 color-difference signal obtained through interpolation of a 4:2:0 signal.

    摘要翻译： 常规色差场间插入单元（10）的输出和由色差4:2:0场间插值单元（11）和色差场内插入单元（ 通过色差静态图像处理方法选择/混合单元切换4：2：2色差信号到4:2:2色差信号，通过场间插值作为逐行信号， 14）根据用于检测图像信号的特性的检测单元（13）的输出等。 因此，可以实现色差信号IP转换静态图像处理，其中正确的4：2：2色差信号的劣化被抑制并且相对于4：2：2色差信号的锯齿减小 通过4：2：0信号的内插获得。

    Method and apparatus for timing adjustment
    6.
    发明授权
    Method and apparatus for timing adjustment 有权

    公开(公告)号：US07272055B2

    公开(公告)日：2007-09-18

    申请号：US11269741

    申请日：2005-11-09

    申请人： Yoshihiro Kishimoto ,  Yuji Sekiguchi ,  Yoichiro Miki

    发明人： Yoshihiro Kishimoto ,  Yuji Sekiguchi ,  Yoichiro Miki

    IPC分类号： G11C7/00

    CPC分类号： G11C7/222 ,  G11C7/10 ,  G11C7/1051 ,  G11C7/106 ,  G11C7/1066 ,  G11C7/1078 ,  G11C7/1093 ,  G11C7/22

    摘要： A strobe signal from a memory is delayed through delay circuits of a strobe delay selection section, thus obtaining a plurality of delayed strobe signals. A strobe latch section produces check data in synchronism with each of the delayed strobe signals, and a system latch section latches, with a system clock, check data latched by the strobe latch section. Based on a comparison by an expected value comparison section and a determination by a delay determination section, the optimal strobe signal with the optimal delay is selected from among the delayed strobe signals produced in the strobe delay selection section. Then, data from the memory is delayed through delay circuits in a data delay selection section, thus obtaining a plurality of delayed data, and the optimal data with the optimal delay is selected from among the plurality of delayed data based on the comparison by the expected value comparison section and the determination by the delay determination section.

    Method and apparatus for timing adjustment
    7.
    发明申请
    Method and apparatus for timing adjustment 有权

    公开(公告)号：US20060140045A1

    公开(公告)日：2006-06-29

    申请号：US11269741

    申请日：2005-11-09

    申请人： Yoshihiro Kishimoto ,  Yuji Sekiguchi ,  Yoichiro Miki

    发明人： Yoshihiro Kishimoto ,  Yuji Sekiguchi ,  Yoichiro Miki

    IPC分类号： G11C8/00 ,  G11C7/22 ,  G11C7/00 ,  G11C7/10

    CPC分类号： G11C7/222 ,  G11C7/10 ,  G11C7/1051 ,  G11C7/106 ,  G11C7/1066 ,  G11C7/1078 ,  G11C7/1093 ,  G11C7/22

    摘要： A strobe signal from a memory is delayed through delay circuits of a strobe delay selection section, thus obtaining a plurality of delayed strobe signals. A strobe latch section produces check data in synchronism with each of the delayed strobe signals, and a system latch section latches, with a system clock, check data latched by the strobe latch section. Based on a comparison by an expected value comparison section and a determination by a delay determination section, the optimal strobe signal with the optimal delay is selected from among the delayed strobe signals produced in the strobe delay selection section. Then, data from the memory is delayed through delay circuits in a data delay selection section, thus obtaining a plurality of delayed data, and the optimal data with the optimal delay is selected from among the plurality of delayed data based on the comparison by the expected value comparison section and the determination by the delay determination section.