公开(公告)号：US20130249420A1

公开(公告)日：2013-09-26

申请号：US13532808

申请日：2012-06-26

申请人： YONG-LONG LEE ,  CHENG-HUNG TSAI

发明人： YONG-LONG LEE ,  CHENG-HUNG TSAI

IPC分类号： H05B37/02

CPC分类号： H05B33/0827

摘要： A light emitting diode (LED) driving system includes a sampling circuit, a control circuit, a PWM controller circuit, a DC/DC converter and a current balance circuit. The sampling circuit detects voltage of cathodes of LED strings of a LED array. The control circuit generates and outputs a control signal according to the minimum voltage of the cathodes of rest LED strings except LED string with the minimum cathode voltage, if the minimum voltage is in an expected voltage range and a difference between the maximum voltage of the cathodes of the LED strings and the minimum voltage of the cathodes of the LED strings is greater than a threshold. The PWM controller circuit generates and outputs PWM signals according to the control signal, to control the DC/DC converter generate and output suitable direct current voltage to drive the LED array. The current balance circuit comprises a plurality of switches.

摘要翻译： 发光二极管（LED）驱动系统包括采样电路，控制电路，PWM控制器电路，DC / DC转换器和电流平衡电路。 采样电路检测LED阵列的LED串的阴极电压。 如果最小电压处于预期的电压范围内，并且阴极的最大电压之间的差异，则控制电路根据具有最小阴极电压的LED串除了其余LED串的阴极的最小电压产生并输出控制信号 并且LED串的阴极的最小电压大于阈值。 PWM控制器电路根据控制信号生成并输出PWM信号，控制DC / DC转换器产生并输出合适的直流电压驱动LED阵列。 当前的平衡电路包括多个开关。

公开(公告)号：US08310164B2

公开(公告)日：2012-11-13

申请号：US12772925

申请日：2010-05-03

申请人： Chin-Po Cheng ,  Yong-Long Lee

发明人： Chin-Po Cheng ,  Yong-Long Lee

IPC分类号： H05B39/00

CPC分类号： H05B41/2822 ,  H01F38/10

摘要： A multi-lamp driving system includes a power supply and at least one balance transformer. Each balance transformer includes two cores, two primary windings, two secondary windings and two protection windings. Each primary winding is wrapped around a core and serially connected to a lamp to form a first circuit branch in parallel connection with each other. The first circuit branches are powered by the power supply. The Each secondary winding is wrapped around a core and connected to a primary winding. The two secondary windings are connected in series to form a short circuit loop. Each of the protection windings is wrapped around a core and connected to a primary winding. The protection windings are wrapped in opposite directions and connected in series to form a second circuit branch. The second circuit branch outputs voltage signals to the power supply when induced voltages crossing the protection windings are unequal.

摘要翻译： 多灯驱动系统包括电源和至少一个平衡变压器。 每个平衡变压器包括两个磁芯，两个初级绕组，两个次级绕组和两个保护绕组。 每个初级绕组缠绕在芯上并串联连接到灯以形成彼此并联连接的第一电路支路。 第一个电路分支由电源供电。 每个次级绕组缠绕在芯上并连接到初级绕组。 两个次级绕组串联连接形成一个短路回路。 每个保护绕组缠绕在芯上并连接到初级绕组。 保护绕组缠绕在相反的方向并串联连接以形成第二电路支路。 当穿过保护绕组的感应电压不相等时，第二电路支路向电源输出电压信号。

公开(公告)号：US09098462B1

公开(公告)日：2015-08-04

申请号：US12881392

申请日：2010-09-14

申请人： Michael J. McNicholl ,  David Joseph Guichard ,  Yong-Long Ling ,  George Wu

发明人： Michael J. McNicholl ,  David Joseph Guichard ,  Yong-Long Ling ,  George Wu

IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G06F13/16 ,  G06F12/02

CPC分类号： G06F13/1631 ,  G06F9/544 ,  G06F12/0215 ,  G06F12/0284 ,  G06F12/109 ,  G06F15/163 ,  G06F2212/1016 ,  G06F2212/657

摘要： A first processing core selects a first memory address of a first memory area based on a last written buffer that identifies a last written memory address. The first memory area is a portion of a shared memory, and the first processing core has sole write access to the first memory area among a plurality of processing cores that use the shared memory. Data is written to the first memory address of the first memory area. After writing the data to the first memory address, the last written buffer is updated to designate the first memory address as the last written memory address of the first memory area. A second processing core of the plurality of processing cores is operable to access the data by accessing the last written buffer and determining, based on the last written buffer, that the data is stored at the first memory address.

摘要翻译： 第一处理核心基于识别最后写入的存储器地址的最后写入的缓冲器来选择第一存储器区域的第一存储器地址。 第一存储器区域是共享存储器的一部分，并且第一处理核心对使用共享存储器的多个处理核心中的第一存储器区域具有唯一的写入访问。 数据被写入第一存储器区域的第一存储器地址。 在将数据写入第一存储器地址之后，最后写入的缓冲器被更新为将第一存储器地址指定为第一存储器区域的最后写入的存储器地址。 多个处理核心的第二处理核心可操作以通过访问最后写入的缓冲器来访问数据，并且基于最后写入的缓冲器确定数据被存储在第一存储器地址。

公开(公告)号：US08913805B2

公开(公告)日：2014-12-16

申请号：US13219997

申请日：2011-08-29

申请人： Yong Long ,  Jeffrey A. Fessler ,  James M. Balter

发明人： Yong Long ,  Jeffrey A. Fessler ,  James M. Balter

IPC分类号： G06K9/00 ,  G06K9/40 ,  G06T11/00 ,  G06T15/08

CPC分类号： G06T11/006 ,  G06T15/08 ,  G06T2211/424

摘要： Methods provided for forward and back-projection, which are referred to as separable footprint (SF) projectors: exemplified by the SF-TR and SF-TT projectors. These methods approximate the voxel footprint functions as 2D separable functions. Because of the separability of these footprint functions, calculating their integrals over a detector cell is greatly simplified and can be implemented efficiently. In some embodiments, the SF-TR projector uses trapezoid functions in the transaxial direction and rectangular functions in the axial direction. In some embodiments, the SF-TT projector uses trapezoid functions in both the axial and transaxial directions. Simulations and experiments showed that both SF projector methods are more accurate than conventional distance-driven (DD) projectors. Moreover, the SF-TT projector is more accurate than the SF-TR projector for rays associated with large cone angles. In some embodiments, the SF-TR projector has similar computation speed with the DD projector and the SF-TT projector is about two times slower.

摘要翻译： 提供用于正向和反向投影的方法，被称为可分离足迹（SF）投影仪：由SF-TR和SF-TT投影机示例。 这些方法将体素足迹功能近似为2D可分离函数。 由于这些足迹功能的可分离性，大大简化了在检测器单元上计算它们的积分，并且可以有效地实现。 在一些实施例中，SF-TR投影仪在轴向方向上使用梯形函数并且在轴向方向上使用矩形函数。 在一些实施例中，SF-TT投影仪在轴向和横轴方向都使用梯形函数。 模拟和实验表明，两种SF投影仪的方法比传统的距离驱动（DD）投影机更为准确。 此外，与大锥角相关的射线，SF-TT投影机比SF-TR投影机更准确。 在一些实施例中，SF-TR投影仪具有与DD投影仪相似的计算速度，并且SF-TT投影机的速度约为慢两倍。

公开(公告)号：US08344653B2

公开(公告)日：2013-01-01

申请号：US12826600

申请日：2010-06-29

申请人： Yong-Long Lee ,  Chin-Po Cheng

发明人： Yong-Long Lee ,  Chin-Po Cheng

IPC分类号： H05B37/02

CPC分类号： H05B33/0815 ,  H05B33/0827 ,  Y02B20/347

摘要： A light emitting diode (LED) backlight driving system drives at least one LED array, and includes a boost power stage circuit, a controller, a multi-channel constant current driving circuit, a voltage dividing circuit, and an offset voltage generating circuit. The boost power stage circuit boosts direct current (DC) power signals to output driving voltage to drive the LED array. The multi-channel constant current driving circuit controls current flowing through the LED array, and outputs regulating voltage to the controller to regulate the driving voltage. The voltage dividing circuit divides the driving voltage to generate feedback voltage to send to the controller. The offset voltage generating circuit generates offset voltage to modify the feedback voltage according to at least one mode selection signal. The controller controls the driving voltage according to the modified feedback voltage and the regulating voltage.

摘要翻译： 发光二极管（LED）背光驱动系统驱动至少一个LED阵列，并且包括升压功率级电路，控制器，多通道恒流驱动电路，分压电路和偏移电压产生电路。 升压功率级电路提升直流（DC）电源信号，输出驱动电压驱动LED阵列。 多通道恒流驱动电路控制流经LED阵列的电流，并向控制器输出调节电压以调节驱动电压。 分压电路对驱动电压进行分压，生成反馈电压，发送给控制器。 偏移电压产生电路根据至少一个模式选择信号产生偏移电压以修改反馈电压。 控制器根据修正的反馈电压和调节电压来控制驱动电压。

公开(公告)号：US08072159B2

公开(公告)日：2011-12-06

申请号：US12416163

申请日：2009-04-01

申请人： Chien-Hung Chen ,  Chin-Po Cheng ,  Yong-Long Lee

发明人： Chien-Hung Chen ,  Chin-Po Cheng ,  Yong-Long Lee

IPC分类号： H05B41/36

CPC分类号： H05B41/282 ,  H05B41/2827

摘要： A multi-lamp driving circuit for driving a plurality of lamps includes at least one power stage circuit, at least one transformer circuit, a balancing circuit, and a control circuit. The power stage circuit converts external electrical signals to alternating current (AC) signals. The transformer circuit is connected to the power stage circuit, to convert the AC signals to high voltage electrical signals capable of driving the lamps. The balancing circuit balances current flowing through the lamps, and includes a capacitor balancing circuit and a transformer balancing circuit. The control circuit is connected between the balancing circuit and the power stage circuit, to control output of the power stage circuit according to variation of the current flowing through the lamps.

摘要翻译： 用于驱动多个灯的多灯驱动电路包括至少一个功率级电路，至少一个变压器电路，平衡电路和控制电路。 功率级电路将外部电信号转换为交流（AC）信号。 变压器电路连接到功率级电路，将交流信号转换成能够驱动灯的高电压电信号。 平衡电路平衡流过灯的电流，并且包括电容器平衡电路和变压器平衡电路。 控制电路连接在平衡电路和功率级电路之间，根据流过灯的电流的变化来控制功率级电路的输出。

公开(公告)号：US20100181918A1

公开(公告)日：2010-07-22

申请号：US12411411

申请日：2009-03-26

申请人： YING-TSUN WU ,  CHIN-PO CHENG ,  YONG-LONG LEE

发明人： YING-TSUN WU ,  CHIN-PO CHENG ,  YONG-LONG LEE

IPC分类号： H05B37/00

CPC分类号： H05B37/03

摘要： A light source driving device for driving a light source includes a power stage circuit, a transformer circuit, a control circuit, and a fault detecting circuit. The power stage circuit converts an external electrical signal to an alternating current (AC) signal. The transformer circuit is connected between the power stage circuit and the light source to convert the AC signal to a high voltage electrical signal adapted for driving the light source. The fault detecting circuit detects whether the light source is nonfunctional, and outputs a fault signal upon the condition that the light source is nonfunctional. The fault detecting circuit includes a voltage level comparison circuit and a variable-benchmark voltage circuit. The control circuit is connected between the fault detecting circuit and the power stage circuit to output a control signal to the power stage circuit based on the fault signal.

摘要翻译： 用于驱动光源的光源驱动装置包括功率级电路，变压器电路，控制电路和故障检测电路。 功率级电路将外部电信号转换为交流（AC）信号。 变压器电路连接在功率级电路和光源之间，以将AC信号转换成适用于驱动光源的高电压电信号。 故障检测电路检测光源是否不起作用，并且在光源不起作用的情况下输出故障信号。 故障检测电路包括电压电平比较电路和可变基准电压电路。 控制电路连接在故障检测电路和功率级电路之间，根据故障信号向功率级电路输出控制信号。

公开(公告)号：US08898370B2

公开(公告)日：2014-11-25

申请号：US12649739

申请日：2009-12-30

申请人： Chih-Kang Yeh ,  Yong-Long Su

发明人： Chih-Kang Yeh ,  Yong-Long Su

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F2212/7202 ,  G06F2212/7203

摘要： A data storage method for storing data into a flash memory chip is provided. The flash memory chip has a plurality of physical addresses, and these physical addresses include a plurality of fast physical addresses and a plurality of slow physical addresses. In the data storage method, the usage rate of the physical addresses is monitored. When the usage rate is not larger than a usage rate threshold value, only the fast physical addresses are used for storing the data into the flash memory chip. When the usage rate is larger than the usage rate threshold value, the fast physical addresses and the slow physical addresses are used for storing the data into the flash memory chip. Thereby, the speed of storing data into the flash memory chip is effectively increased.

摘要翻译： 提供了一种用于将数据存储到闪存芯片中的数据存储方法。 闪速存储器芯片具有多个物理地址，并且这些物理地址包括多个快速物理地址和多个慢物理地址。 在数据存储方法中，监视物理地址的使用率。 当使用率不大于使用率阈值时，仅使用快速物理地址将数据存储到闪存芯片中。 当使用率大于使用率阈值时，快速物理地址和慢物理地址用于将数据存储到闪存芯片中。 从而有效地提高了将数据存入闪存芯片的速度。

公开(公告)号：US08436540B2

公开(公告)日：2013-05-07

申请号：US13110006

申请日：2011-05-18

申请人： Chin-Po Cheng ,  Yong-Long Lee

发明人： Chin-Po Cheng ,  Yong-Long Lee

IPC分类号： H05B37/02

CPC分类号： G09G3/342 ,  G09G3/2096 ,  G09G2310/024 ,  G09G2320/064 ,  G09G2320/0653

摘要： A multi-lamp driving system includes a pulse width modulation (PWM) controller, transformers, a current difference detection circuit, a lighting detection circuit, a frequency scanning detection circuit, a frequency regulating circuit, and a duty cycle regulating circuit. The current difference detection circuit detects difference among current flowing through lamps to determine if the current fluctuates. The lighting detection circuit determines if the lamps are lit according to the current, and generates a lighting indication signal after the lamps are lit. The frequency scanning detection circuit determines if the multi-lamp driving system is in a frequency scanning process according to the lighting indication signal, and generates a frequency scanning indication signal if the multi-lamp driving system is in the frequency scanning process. The duty cycle regulating circuit regulates duty cycles of the PWM signals upon the condition that the current fluctuates and the multi-lamp driving system is in the frequency scanning process.

摘要翻译： 多灯驱动系统包括脉宽调制（PWM）控制器，变压器，电流差检测电路，点亮检测电路，频率扫描检测电路，频率调节电路和占空比调节电路。 电流差检测电路检测流过灯的电流之间的差异，以确定电流是否波动。 照明检测电路根据电流确定灯是否点亮，并且在灯被点亮之后产生点亮指示信号。 频率扫描检测电路根据点亮指示信号来判断多灯驱动系统是否处于频率扫描处理，如果多灯驱动系统处于频率扫描处理中，则产生频率扫描指示信号。 占空比调节电路在电流波动，多灯驱动系统处于频率扫描过程中调节PWM信号的占空比。

公开(公告)号：US20130071374A1

公开(公告)日：2013-03-21

申请号：US13449095

申请日：2012-04-17

申请人： Masayori Inouye ,  Junjie Zhang ,  Yong Long Zhang

发明人： Masayori Inouye ,  Junjie Zhang ,  Yong Long Zhang

IPC分类号： C12N9/22 ,  C12P19/34 ,  A61K38/46 ,  C12Q1/44

CPC分类号： C12N9/22 ,  A61K38/465 ,  C12N15/70 ,  C12P19/34 ,  C12Q1/42 ,  C12Q1/44 ,  G01N2333/922 ,  G01N2800/26

摘要： The present invention is directed to the discovery of a novel family of enzymes designated herein as mRNA interferases that exhibit endoribonuclease activity. The novel finding of the present inventors, therefore, presents new applications for which mRNA interferase nucleic and amino acid sequences, and compositions thereof may be used to advantage. The invention also encompasses screening methods to identify compounds/agents capable of modulating mRNA interferase activity and methods for using such compounds/agents. Also provided is a kit comprising mRNA interferase nucleic and/or amino acid sequences, mRNA interferase activity compatible buffers, and instruction materials.

摘要翻译： 本发明涉及在本文中称为表达内切核糖核酸酶活性的mRNA干扰酶的新型家族的发现。 因此，本发明人的新发现提出了可以使用mRNA干扰酶核酸和氨基酸序列及其组合物的新用途。 本发明还包括鉴定能够调节mRNA干扰酶活性的化合物/试剂的筛选方法以及使用这些化合物/试剂的方法。 还提供了包含mRNA干扰酶核酸和/或氨基酸序列，mRNA干扰酶活性相容缓冲液和说明材料的试剂盒。