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    Methods of manufacturing semiconductor devices with Si and SiGe epitaxial layers
    1.
    发明申请
    Methods of manufacturing semiconductor devices with Si and SiGe epitaxial layers 有权
    制造具有Si和SiGe外延层的半导体器件的方法

    公开(公告)号：US20120003799A1

    公开(公告)日：2012-01-05

    申请号：US13137733

    申请日：2011-09-08

    申请人： Jin-bum Kim ,  Si-young Choi ,  Hyung-Ik Lee ,  Ki-hong Kim ,  Yong-koo Kyoung

    发明人： Jin-bum Kim ,  Si-young Choi ,  Hyung-Ik Lee ,  Ki-hong Kim ,  Yong-koo Kyoung

    IPC分类号： H01L21/8238

    CPC分类号： H01L21/823814 ,  H01L21/26506 ,  H01L21/28518 ,  H01L21/28525 ,  H01L21/76804 ,  H01L21/76814 ,  H01L21/76831 ,  H01L21/76855 ,  H01L21/823871 ,  H01L23/485 ,  H01L29/165 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7848 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Methods of manufacturing semiconductor devices may include forming a first layer on a first active region (P-channel FET), forming a second layer on a second active region (N-channel FET), the first and second layers including a silicon germanium (SiGe) epitaxial layer sequentially stacked on a silicon (Si) epitaxial layer, forming a first contact hole in an interlayer insulating film including a first lower region exposing the SiGe epitaxial layer of the first layer, forming a second contact hole in the interlayer insulating film including a second lower region penetrating through the SiGe epitaxial layer of the second layer and exposing the Si epitaxial layer of the second layer, forming a first metal silicide film including germanium (Ge) in the first lower region, forming a second metal silicide film not including Ge in the second lower region simultaneously with the forming of the first metal silicide film.

    摘要翻译： 制造半导体器件的方法可以包括在第一有源区（P沟道FET）上形成第一层，在第二有源区（N沟道FET）上形成第二层，第一和第二层包括硅锗（SiGe ）外延层，其顺序堆叠在硅（Si）外延层上，在包括暴露第一层的SiGe外延层的第一下部区域的层间绝缘膜中形成第一接触孔，在层间绝缘膜中形成第二接触孔，所述第二接触孔包括 穿过第二层的SiGe外延层并暴露第二层的Si外延层的第二下部区域，在第一下部区域中形成包括锗（Ge）的第一金属硅化物膜，形成不包括第二金属硅化物膜的第二金属硅化物膜 Ge在第二下部区域同时形成第一金属硅化物膜。

    Semiconductor devices and methods of manufacturing the same
    6.
    发明申请
    Semiconductor devices and methods of manufacturing the same 有权
    半导体器件及其制造方法

    公开(公告)号：US20100123198A1

    公开(公告)日：2010-05-20

    申请号：US12591249

    申请日：2009-11-13

    申请人： Jin-bum Kim ,  Si-young Choi ,  Hyung-ik Lee ,  Ki-hong Kim ,  Yong-koo Kyoung

    发明人： Jin-bum Kim ,  Si-young Choi ,  Hyung-ik Lee ,  Ki-hong Kim ,  Yong-koo Kyoung

    IPC分类号： H01L27/092 ,  H01L21/8238 ,  H01L29/772

    CPC分类号： H01L21/823814 ,  H01L21/26506 ,  H01L21/28518 ,  H01L21/28525 ,  H01L21/76804 ,  H01L21/76814 ,  H01L21/76831 ,  H01L21/76855 ,  H01L21/823871 ,  H01L23/485 ,  H01L29/165 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7848 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Provided are semiconductor devices having low resistance contacts and methods of manufacturing the same. One or more of the semiconductor devices include a substrate having first and second active regions; a P-channel field-effect transistor associated with the first active region and including at least one of the source and drain regions; a N-channel field-effect transistor associated with the second active region and including at least one of the source and drain regions; a first contact pad layer comprising silicon (Si) and SiGe epitaxial layers on the at least one of the source and drain regions of the P-channel field-effect transistor, the SiGe epitaxial layer being sequentially stacked on the Si epitaxial layer; a second contact pad layer comprising silicon (Si) and SiGe epitaxial layers on the at least one of the source and drain regions of the N-channel field-effect transistor, the SiGe epitaxial layer being sequentially stacked on the Si epitaxial layer; an interlayer insulating film formed on the P-channel and the N-channel field-effect transistors and including first and second contact holes, wherein the first contact hole includes a first lower region that exposes the SiGe epitaxial layer of the first contact pad layer and the second contact hole includes a second lower region that penetrates through the SiGe epitaxial layer of the second contact pad layer to expose the Si epitaxial layer of the second contact pad layer; first and second metal silicide films formed respectively in the first and second lower regions of the contact holes; and contact plugs formed on the first and second metal silicide films and filled in the first and second contact holes.

    摘要翻译： 提供具有低电阻触点的半导体器件及其制造方法。 一个或多个半导体器件包括具有第一和第二有源区的衬底; 与所述第一有源区相关并且包括所述源极和漏极区中的至少一个的P沟道场效应晶体管; 与所述第二有源区相关并且包括所述源极和漏极区中的至少一个的N沟道场效应晶体管; 在所述P沟道场效应晶体管的所述源极和漏极区的至少一个上包括硅（Si）和SiGe外延层的第一接触焊盘层，所述SiGe外延层顺序地堆叠在所述Si外延层上; 在所述N沟道场效应晶体管的所述源极和漏极区的至少一个上包括硅（Si）和SiGe外延层的第二接触焊盘层，所述SiGe外延层顺序地堆叠在所述Si外延层上; 形成在P沟道和N沟道场效应晶体管上并且包括第一和第二接触孔的层间绝缘膜，其中第一接触孔包括暴露第一接触焊盘层的SiGe外延层的第一下部区域和 第二接触孔包括穿过第二接触焊盘层的SiGe外延层的第二下部区域，以暴露第二接触焊盘层的Si外延层; 第一和第二金属硅化物膜分别形成在接触孔的第一和第二下部区域中; 以及形成在第一和第二金属硅化物膜上的接触塞，并填充在第一和第二接触孔中。