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    Hybrid apparatus and methods for analyzing electromagnetic waves
    1.
    发明授权
    Hybrid apparatus and methods for analyzing electromagnetic waves 有权
    用于分析电磁波的混合装置和方法

    公开(公告)号：US09229226B2

    公开(公告)日：2016-01-05

    申请号：US13494226

    申请日：2012-06-12

    申请人： Shin-Wook Yi ,  Masatomo Nakazato ,  Tetsunori Wada ,  Hyun-joo Kim ,  Young-kwan Park ,  Jae-sung Shin

    发明人： Shin-Wook Yi ,  Masatomo Nakazato ,  Tetsunori Wada ,  Hyun-joo Kim ,  Young-kwan Park ,  Jae-sung Shin

    IPC分类号： G06F7/60 ,  G06F17/10 ,  G02B27/00 ,  G06F17/50 ,  G02F1/313 ,  G02F1/00 ,  G02B6/35

    CPC分类号： G02B27/0012 ,  G02B6/3588 ,  G02F1/0081 ,  G02F1/3134 ,  G06F17/5018

    摘要： Analysis of an electromagnetic wave traveling in an optical device, can be performed quickly and correctly. A structure forming process simulator forms an analysis structure of a physical object to be analyzed. A hybrid optical simulator calculates time-independent data and time-dependent data of an electromagnetic field by dividing the analysis structure into parts, determining whether a metallic or magnetic material is included in each of the divided parts, and selectively applying a Beam Propagation Method (BPM) or a Finite Difference Time Domain (FDTD) method to the divided parts. A storage device stores the time-independent data and the time-dependent data output from the hybrid optical simulator as hybrid electric field data. Related methods are also described.

    摘要翻译： 能够快速，准确地进行光学装置中的电磁波的分析。 结构形成过程模拟器形成要分析的物理对象的分析结构。 混合光学模拟器通过将分析结构划分为部分来计算电磁场的时间无关数据和时间依赖数据，确定每个分割部分中是否包括金属或磁性材料，以及选择性地应用光束传播方法 BPM）或有限差分时域（FDTD）方法。 存储装置将与混合光模拟器输出的时间无关的数据和时间相关数据存储为混合电场数据。 还描述了相关方法。

    SEMICONDUCTOR MEMORY DEVICE HAVING CAPACITOR AND SEMICONDUCTOR DEVICE
    2.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE HAVING CAPACITOR AND SEMICONDUCTOR DEVICE 有权
    具有电容器和半导体器件的半导体存储器件

    公开(公告)号：US20120049380A1

    公开(公告)日：2012-03-01

    申请号：US13194086

    申请日：2011-07-29

    申请人： Seung-mo Kim ,  Ji-woong Sue ,  Jin-kyu Park ,  Young-kwan Park

    发明人： Seung-mo Kim ,  Ji-woong Sue ,  Jin-kyu Park ,  Young-kwan Park

    IPC分类号： H01L29/40

    CPC分类号： H01L27/0207 ,  H01L27/10852 ,  H01L28/90

    摘要： An example embodiment relates to a semiconductor memory device including a plurality of cylindrical bottom electrodes arranged in a first direction and in a second direction. The device includes a supporting base configured to support the plurality of cylindrical bottom electrodes by contacting side surfaces of the plurality of cylindrical bottom electrodes. The supporting base includes first patterns in which first open areas are formed, and second patterns in which second open areas are formed. The first patterns and the second patterns have different oriented shapes.

    摘要翻译： 示例性实施例涉及一种半导体存储器件，其包括沿第一方向和第二方向布置的多个圆柱形底部电极。 该装置包括：支撑基座，其配置成通过接触多个圆柱形底部电极的侧表面来支撑多个圆柱形底部电极。 支撑基座包括形成有第一开放区域的第一图案和形成有第二开放区域的第二图案。 第一图案和第二图案具有不同的定向形状。

    Systems and Methods for Executing Unified Process-Device-Circuit Simulation
    6.
    发明申请
    Systems and Methods for Executing Unified Process-Device-Circuit Simulation 有权
    执行统一过程设备电路仿真的系统和方法

    公开(公告)号：US20100114553A1

    公开(公告)日：2010-05-06

    申请号：US12607206

    申请日：2009-10-28

    申请人： Kyung Rok Kim ,  Kyu-Baik Chang ,  Young Kwan Park ,  Seung Chul Lee ,  Jin Kyu Park

    发明人： Kyung Rok Kim ,  Kyu-Baik Chang ,  Young Kwan Park ,  Seung Chul Lee ,  Jin Kyu Park

    IPC分类号： G06F17/50 ,  G06F19/00

    CPC分类号： G06F17/5022 ,  G06F11/3476 ,  G06F13/105 ,  G06F17/5009

    摘要： A unified simulation system is provided. The unified simulation system includes an input database storing input data comprising an input parameter and environment information, a unified simulator executing a unified process-device-circuit simulation of characteristics of a semiconductor apparatus based on the input data and at least one predetermined model and outputting a simulation result as output data, and an output database storing the output data. The unified simulator includes a process simulator simulating at least one process based on the input data and outputting process characteristic data, a device simulator simulating at least one device based on the process characteristic data and outputting device characteristic data, and a circuit simulator simulating a circuit comprising the at least one device. Accordingly, multiple devices can be simultaneously optimized for the optimization of circuit characteristics and an accurate specification at process and device levels can be provided.

    摘要翻译： 提供统一的仿真系统。 该统一模拟系统包括存储包括输入参数和环境信息的输入数据的输入数据库，统一模拟器，根据输入数据和至少一个预定模型，对半导体装置的特性执行统一的处理装置电路仿真，并输出 作为输出数据的模拟结果，以及存储输出数据的输出数据库。 统一模拟器包括：基于输入数据模拟至少一个过程并输出过程特征数据的过程仿真器;基于过程特性数据模拟至少一个设备并输出设备特征数据的设备模拟器;以及模拟电路的电路仿真器 包括所述至少一个装置。 因此，可以同时优化多个装置以优化电路特性，并且可以提供在处理和设备级别的精确规格。

    Simulation method of wafer warpage
    7.
    发明申请
    Simulation method of wafer warpage 审中-公开
    晶圆翘曲的仿真方法

    公开(公告)号：US20070087529A1

    公开(公告)日：2007-04-19

    申请号：US11580352

    申请日：2006-10-13

    申请人： Won-Young Chung ,  Tai-Kyung Kim ,  Young-Kwan Park ,  Ui-Hui Kwon ,  Kyu-Baik Chang

    发明人： Won-Young Chung ,  Tai-Kyung Kim ,  Young-Kwan Park ,  Ui-Hui Kwon ,  Kyu-Baik Chang

    IPC分类号： H01L21/30 ,  H01L21/46

    CPC分类号： H01L21/76838

    摘要： Disclosed is a simulation method for determining wafer warpage. This method includes dividing layers and evaluating a composition ratio of materials composing the layers. The method mathematically transforms a semiconductor device, which is constructed as a complicated structure with various materials, into a simplified, mathematically equivalent stacked structure comprising a plurality of unit layer, and utilizes values of mechanical characteristics, which are obtained from the transformed layer structure, for estimating wafer warpage. As a result, it is possible to complete an operation of wafer warpage simulation using information about pattern density of the semiconductor device.

    摘要翻译： 公开了一种用于确定晶片翘曲的模拟方法。 该方法包括分层和评估构成层的材料的组成比。 该方法将构成为具有各种材料的复杂结构的半导体器件数学地变换为包括多个单位层的简化的，数学上等效的堆叠结构，并利用从变换层结构获得的机械特性值， 用于估计晶片翘曲。 结果，可以使用关于半导体器件的图案密度的信息来完成晶片翘曲模拟的操作。

    Systems and methods for executing unified process-device-circuit simulation
    9.
    发明授权
    Systems and methods for executing unified process-device-circuit simulation 有权
    执行统一过程设备电路仿真的系统和方法

    公开(公告)号：US09235664B2

    公开(公告)日：2016-01-12

    申请号：US12607206

    申请日：2009-10-28

    申请人： Kyung Rok Kim ,  Kyu-Baik Chang ,  Young Kwan Park ,  Seung Chul Lee ,  Jin Kyu Park

    发明人： Kyung Rok Kim ,  Kyu-Baik Chang ,  Young Kwan Park ,  Seung Chul Lee ,  Jin Kyu Park

    IPC分类号： G06F17/50 ,  G06G7/62 ,  G06F9/44 ,  G06F13/10 ,  G06F13/12 ,  G06F11/34

    CPC分类号： G06F17/5022 ,  G06F11/3476 ,  G06F13/105 ,  G06F17/5009

    摘要： A unified simulation system is provided. The unified simulation system includes an input database storing input data comprising an input parameter and environment information, a unified simulator executing a unified process-device-circuit simulation of characteristics of a semiconductor apparatus based on the input data and at least one predetermined model and outputting a simulation result as output data, and an output database storing the output data. The unified simulator includes a process simulator simulating at least one process based on the input data and outputting process characteristic data, a device simulator simulating at least one device based on the process characteristic data and outputting device characteristic data, and a circuit simulator simulating a circuit comprising the at least one device. Accordingly, multiple devices can be simultaneously optimized for the optimization of circuit characteristics and an accurate specification at process and device levels can be provided.

    摘要翻译： 提供统一的仿真系统。 该统一模拟系统包括存储包括输入参数和环境信息的输入数据的输入数据库，统一模拟器，根据输入数据和至少一个预定模型，对半导体装置的特性执行统一的处理装置电路仿真，并输出 作为输出数据的模拟结果，以及存储输出数据的输出数据库。 统一模拟器包括：基于输入数据模拟至少一个过程并输出过程特征数据的过程仿真器;基于过程特性数据模拟至少一个设备并输出设备特征数据的设备模拟器;以及模拟电路的电路仿真器 包括所述至少一个装置。 因此，可以同时优化多个装置以优化电路特性，并且可以提供在处理和设备级别的精确规格。

    Semiconductor devices including an air-gap and methods of manufacturing the same
    10.
    发明授权
    Semiconductor devices including an air-gap and methods of manufacturing the same 有权
    包括气隙的半导体器件及其制造方法

    公开(公告)号：US09035419B2

    公开(公告)日：2015-05-19

    申请号：US13216004

    申请日：2011-08-23

    申请人： Sang-Woo Oh ,  Dae-Sin Kim ,  Young-Kwan Park ,  Keun-Ho Lee ,  Seon-Young Lee

    发明人： Sang-Woo Oh ,  Dae-Sin Kim ,  Young-Kwan Park ,  Keun-Ho Lee ,  Seon-Young Lee

    IPC分类号： H01L21/764 ,  H01L27/115 ,  H01L21/28 ,  H01L21/762 ,  H01L29/788

    CPC分类号： H01L27/11517 ,  H01L21/28273 ,  H01L21/76224 ,  H01L21/764 ,  H01L27/11519 ,  H01L27/11521 ,  H01L29/0653

    摘要： A semiconductor device including a substrate having a trench formed therein, a plurality of gate structures, an isolation layer pattern and an insulating interlayer pattern. The substrate includes a plurality of active regions defined by the trench and spaced apart from each other in a second direction. Each of the active regions extends in a first direction substantially perpendicular to the second direction. Each of the plurality of gate structures includes a tunnel insulation layer pattern, a floating gate, a dielectric layer pattern and a control gate sequentially stacked on the substrate. The isolation layer pattern is formed in the trench. First isolation layer pattern has at least one first air gap between sidewalls of at least one adjacent pair of the floating gates. The insulating interlayer pattern is formed between the gate structures, and the first insulating interlayer pattern extends in the second direction.

    摘要翻译： 一种半导体器件，包括其中形成有沟槽的衬底，多个栅极结构，隔离层图案和绝缘层间图案。 衬底包括由沟槽限定的多个有源区，并在第二方向彼此间隔开。 每个有源区域沿着基本上垂直于第二方向的第一方向延伸。 多个栅极结构中的每一个包括依次层叠在基板上的隧道绝缘层图案，浮动栅极，电介质层图案和控制栅极。 隔离层图案形成在沟槽中。 第一隔离层图案在至少一对相邻的浮置栅极的侧壁之间具有至少一个第一气隙。 绝缘层间图案形成在栅极结构之间，第一绝缘层间图案沿第二方向延伸。