-
公开(公告)号：US20250110750A1
公开(公告)日：2025-04-03
申请号：US18375294
申请日：2023-09-29
Applicant: ATI TECHNOLOGIES ULC , ADVANCED MICRO DEVICES, INC.
Inventor： Andy Sung , Carl Kittredge Wakeland , Gregory B. Shippen , Kaushal Amolak Sanghai , Uma Sankara Rao Balla , Balatripura S. Chavali
IPC: G06F9/4401
Abstract: A processing system stores a boot image for a critical domain of a system-on-a-chip (SOC) at a bank of a static random-access memory (SRAM) that is shared by the critical domain and a non-critical domain and that is powered independently from the non-critical domain. The SOC includes a secure processor that loads the boot image to the bank of the SRAM and then blocks subsequent write access to the bank. Because the critical domain is powered independently from the non-critical domain, the bank of the SRAM retains the boot image without regard to the power state of the non-critical domain. In addition, the critical domain implements a boot process that is decoupled from a CPU at the non-critical domain, ensuring that the critical domain can initiate a re-boot sequence even if the non-critical domain is not powered.
-
公开(公告)号：US20250157561A1
公开(公告)日：2025-05-15
申请号：US18389056
申请日：2023-11-13
Applicant: ADVANCED MICRO DEVICES, INC. , ATI TECHNOLOGIES ULC
Inventor： Uma Sankara Rao Balla , Carl Kittredge Wakeland , Kaushal Amolak Sanghai , Balatripura S. Chavali , Andy Sung
IPC: G11C29/42
Abstract: A system on a chip (SOC) includes a critical domain including components configured to perform critical operations and a non-critical domain including components configured to perform non-critical operations. To help perform such operations, the critical domain and non-critical domain share a static random-access memory (SRAM) that includes a first subset of memory banks assigned to the critical domain and a second subset of memory banks assigned to the non-critical domain. The SOC further includes a memory scrubbing circuitry configured to sequentially check each memory bank of the SRAM for errors. To this end, the memory scrubbing circuitry is configured to check a respective memory bank for errors each time an event trigger occurs by implementing one or more error correction codes.
-
公开(公告)号：US11182186B2
公开(公告)日：2021-11-23
申请号：US15663499
申请日：2017-07-28
Applicant: Advanced Micro Devices, Inc. , ATI Technologies ULC
Inventor： Anthony Asaro , Yinan Jiang , Andy Sung , Ahmed M. Abdelkhalek , Xiaowei Wang , Sidney D. Fortes
Abstract: A technique for recovering from a hang in a virtualized accelerated processing device (“APD”) is provided. In the virtualization scheme, different virtual machines are assigned different “time-slices” in which to use the APD. When a time-slice expires, the APD stops operations for a current VM and starts operations for another VM. To stop operations on the APD, a virtualization scheduler sends a request to idle the APD. The APD responds by completing work and idling. If one or more portions of the APD do not complete this idling process before a timeout expires, then a hang occurs. In response to the hang, the virtualization scheduler informs the hypervisor that a hang has occurred. The hypervisor performs a function level reset on the APD and informs the VM that the hang has occurred. The VM responds by stopping command issue to the APD and re-initializing the APD for the function.
-
公开(公告)号：US20190018699A1
公开(公告)日：2019-01-17
申请号：US15663499
申请日：2017-07-28
Applicant: Advanced Micro Devices, Inc. , ATI Technologies ULC
Inventor： Anthony Asaro , Yinan Jiang , Andy Sung , Ahmed M. Abdelkhalek , Xiaowei Wang , Sidney D. Fortes
Abstract: A technique for recovering from a hang in a virtualized accelerated processing device (“APD”) is provided. In the virtualization scheme, different virtual machines are assigned different “time-slices” in which to use the APD. When a time-slice expires, the APD stops operations for a current VM and starts operations for another VM. To stop operations on the APD, a virtualization scheduler sends a request to idle the APD. The APD responds by completing work and idling. If one or more portions of the APD do not complete this idling process before a timeout expires, then a hang occurs. In response to the hang, the virtualization scheduler informs the hypervisor that a hang has occurred. The hypervisor performs a function level reset on the APD and informs the VM that the hang has occurred. The VM responds by stopping command issue to the APD and re-initializing the APD for the function.
-
公开(公告)号：US10452554B2
公开(公告)日：2019-10-22
申请号：US15094391
申请日：2016-04-08
Applicant: Advanced Micro Devices, Inc. , ATI Technologies ULC
Inventor： Ihab Amer , Khaled Mammou , Haibo Liu , Edward Harold , Fabio Gulino , Samuel Naffziger , Gabor Sines , Lawrence A. Bair , Andy Sung , Lei Zhang
IPC: G06F12/08 , G11C11/417 , G06F12/0877 , G06F12/0893 , G11C5/14
Abstract: Systems, apparatuses and methods of adaptively controlling a cache operating voltage are provided that comprise receiving indications of a plurality of cache usage amounts. Each cache usage amount corresponds to an amount of data to be accessed in a cache by one of a plurality of portions of a data processing application. The plurality of cache usage amounts are determining based on the received indications of the plurality of cache usage amounts. A voltage level applied to the cache is adaptively controlled based on one or more of the plurality of determined cache usage amounts. Memory access to the cache is controlled to be directed to a non-failing portion of the cache at the applied voltage level.
-
Patent Agency Ranking
公开(公告)号：US20170293564A1
公开(公告)日：2017-10-12
申请号：US15094391
申请日：2016-04-08
Applicant: Advanced Micro Devices, Inc. , ATI Technologies ULC
Inventor： Ihab Amer , Khaled Mammou , Haibo Liu , Edward Harold , Fabio Gulino , Samuel Naffziger , Gabor Sines , Lawrence A. Bair , Andy Sung , Lei Zhang
IPC: G06F12/08 , G11C11/417
CPC classification number: G06F12/0877 , G06F12/0893 , G06F2212/1028 , G06F2212/221 , G06F2212/60 , G11C5/148 , G11C11/417
Abstract: Systems, apparatuses and methods of adaptively controlling a cache operating voltage are provided that comprise receiving indications of a plurality of cache usage amounts. Each cache usage amount corresponds to an amount of data to be accessed in a cache by one of a plurality of portions of a data processing application. The plurality of cache usage amounts are determining based on the received indications of the plurality of cache usage amounts. A voltage level applied to the cache is adaptively controlled based on one or more of the plurality of determined cache usage amounts. Memory access to the cache is controlled to be directed to a non-failing portion of the cache at the applied voltage level.
-
公开(公告)号：US12169729B2
公开(公告)日：2024-12-17
申请号：US17453341
申请日：2021-11-02
Applicant: ATI Technologies ULC
Inventor： Yinan Jiang , Ahmed M. Abdelkhalek , Guopei Qiao , Andy Sung , Haibo Liu , Dezhi Ming , Zhidong Xu
Abstract: A technique for varying firmware for different virtual functions in a virtualized device is provided. The virtualized device includes a hardware accelerator and a microcontroller that executes firmware. The virtualized device is virtualized in that the virtualized device performs work for different virtual functions (with different virtual functions associated with different virtual machines), each function getting a “time-slice” during which work is performed for that function. To vary the firmware, each time the virtualized device switches from performing work for a current virtual function to work for a subsequent virtual function, one or more microcontrollers of the virtualized device examines memory storing addresses for firmware for the subsequent virtual function and begins executing the firmware for that subsequent virtual function. The addresses for the firmware are provided by a corresponding virtual machine at configuration time.
-
公开(公告)号：US11768696B2
公开(公告)日：2023-09-26
申请号：US17121678
申请日：2020-12-14
Applicant: ATI Technologies ULC
Inventor： Yinan Jiang , Kamraan Nasim , Dezhi Ming , Ahmed M. Abdelkhalek , Dmytro Chenchykov , Andy Sung
CPC classification number: G06F9/45558 , G06F9/45545 , G06F9/4812 , G06F2009/45591 , G06F2009/45595
Abstract: A technique for managing access to a micro engine, the method comprising: determining that a virtual function “VF”) is to be given access to direct communication with a micro engine; in response to the determining, configuring the micro engine to accept direct communication from the VF; monitoring for unpermitted communication; and after a time period has expired, configuring the micro engine to no longer accept direct communication from the VF.
-
公开(公告)号：US10459751B2
公开(公告)日：2019-10-29
申请号：US15639971
申请日：2017-06-30
Applicant: ATI Technologies ULC
Inventor： Yinan Jiang , Ahmed M. Abdelkhalek , Guopei Qiao , Andy Sung , Haibo Liu , Dezhi Ming , Zhidong Xu
Abstract: A technique for varying firmware for different virtual functions in a virtualized device is provided. The virtualized device includes a hardware accelerator and a microcontroller that executes firmware. The virtualized device is virtualized in that the virtualized device performs work for different virtual functions (with different virtual functions associated with different virtual machines), each function getting a “time-slice” during which work is performed for that function. To vary the firmware, each time the virtualized device switches from performing work for a current virtual function to work for a subsequent virtual function, one or more microcontrollers of the virtualized device examines memory storing addresses for firmware for the subsequent virtual function and begins executing the firmware for that subsequent virtual function. The addresses for the firmware are provided by a corresponding virtual machine at configuration time.
-
公开(公告)号：US20220058048A1
公开(公告)日：2022-02-24
申请号：US17453341
申请日：2021-11-02
Applicant: ATI Technologies ULC
Inventor： Yinan Jiang , Ahmed M. Abdelkhalek , Guopei Qiao , Andy Sung , Haibo Liu , Dezhi Ming , Zhidong Xu
Abstract: A technique for varying firmware for different virtual functions in a virtualized device is provided. The virtualized device includes a hardware accelerator and a microcontroller that executes firmware. The virtualized device is virtualized in that the virtualized device performs work for different virtual functions (with different virtual functions associated with different virtual machines), each function getting a “time-slice” during which work is performed for that function. To vary the firmware, each time the virtualized device switches from performing work for a current virtual function to work for a subsequent virtual function, one or more microcontrollers of the virtualized device examines memory storing addresses for firmware for the subsequent virtual function and begins executing the firmware for that subsequent virtual function. The addresses for the firmware are provided by a corresponding virtual machine at configuration time.
-
-
-
-
-
-
-
-
-
Search Results
20
records
(took 0.017 seconds)
