公开(公告)号：US20170371761A1

公开(公告)日：2017-12-28

申请号：US15192748

申请日：2016-06-24

Applicant: Advanced Micro Devices, Inc.

Inventor： Leonardo Piga ,  Brian J. Kocoloski ,  Wei Huang ,  Abhinandan Majumdar ,  Indrani Paul

IPC: G06F11/36 ,  G06F9/45

CPC classification number: G06F11/3604 ,  G06F9/45516

Abstract: Systems, apparatuses, and methods for performing real-time tracking of performance targets using dynamic compilation. A performance target is specified in a service level agreement. A dynamic compiler analyzes a software application executing in real-time and determine which high-level application metrics to track. The dynamic compiler then inserts instructions into the code to increment counters associated with the metrics. A power optimization unit then utilizes the counters to determine if the system is currently meeting the performance target. If the system is exceeding the performance target, then the power optimization unit reduces the power consumption of the system while still meeting the performance target.

公开(公告)号：US20170371719A1

公开(公告)日：2017-12-28

申请号：US15192784

申请日：2016-06-24

Applicant: Advanced Micro Devices, Inc.

Inventor： Abhinandan Majumdar ,  Brian J. Kocoloski ,  Leonardo Piga ,  Wei Huang ,  Yasuko Eckert

IPC: G06F9/50 ,  G06F1/32

CPC classification number: G06F9/4893 ,  G06F1/206 ,  G06F1/329 ,  G06F9/5094 ,  Y02D10/24

Abstract: Systems, apparatuses, and methods for performing temperature-aware task scheduling and proactive power management. A SoC includes a plurality of processing units and a task queue storing pending tasks. The SoC calculates a thermal metric for each pending task to predict an amount of heat the pending task will generate. The SoC also determines a thermal gradient for each processing unit to predict a rate at which the processing unit's temperature will change when executing a task. The SoC also monitors a thermal margin of how far each processing unit is from reaching its thermal limit. The SoC minimizes non-uniform heat generation on the SoC by scheduling pending tasks from the task queue to the processing units based on the thermal metrics for the pending tasks, the thermal gradients of each processing unit, and the thermal margin available on each processing unit.

公开(公告)号：US10452437B2

公开(公告)日：2019-10-22

申请号：US15192784

申请日：2016-06-24

Applicant: Advanced Micro Devices, Inc.

Inventor： Abhinandan Majumdar ,  Brian J. Kocoloski ,  Leonardo Piga ,  Wei Huang ,  Yasuko Eckert

IPC: G06F9/48 ,  G06F9/50 ,  G06F1/20 ,  G06F1/329

Abstract: Systems, apparatuses, and methods for performing temperature-aware task scheduling and proactive power management. A SoC includes a plurality of processing units and a task queue storing pending tasks. The SoC calculates a thermal metric for each pending task to predict an amount of heat the pending task will generate. The SoC also determines a thermal gradient for each processing unit to predict a rate at which the processing unit's temperature will change when executing a task. The SoC also monitors a thermal margin of how far each processing unit is from reaching its thermal limit. The SoC minimizes non-uniform heat generation on the SoC by scheduling pending tasks from the task queue to the processing units based on the thermal metrics for the pending tasks, the thermal gradients of each processing unit, and the thermal margin available on each processing unit.

公开(公告)号：US20170373955A1

公开(公告)日：2017-12-28

申请号：US15192764

申请日：2016-06-24

Applicant: Advanced Micro Devices, Inc.

Inventor： Brian J. Kocoloski ,  Leonardo Piga ,  Wei Huang ,  Indrani Paul

IPC: H04L12/26

CPC classification number: G06F11/30 ,  G06F9/4893 ,  G06F2209/5019 ,  Y02D10/24

Abstract: Systems, apparatuses, and methods for achieving balanced execution in a multi-node cluster through runtime detection of performance variation are described. During a training phase, performance counters and an amount of time spent waiting for synchronization is monitored for a plurality of tasks for each node of the multi-node cluster. These values are utilized to generate a model which correlates the values of the performance counters to the amount of time spent waiting for synchronization. Once the model is built, the values of the performance counters are monitored for a period of time at the start of each task, and these values are input into the model. The model generates a prediction of whether a given node is on the critical path. If the given node is predicted to be on the critical path, the power allocation of the given node is increased.