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公开(公告)号:US20170269651A1
公开(公告)日:2017-09-21
申请号:US15071643
申请日:2016-03-16
Applicant: Advanced Micro Devices, Inc.
Inventor: Wei Huang , Manish Arora , Abhinandan Majumdar , Indrani Paul , Leonardo de Paula Rosa Piga
CPC classification number: G06F1/206 , G06F1/324 , G06F1/329 , G06F1/3296 , Y02D10/126 , Y02D10/16 , Y02D10/172 , Y02D10/24
Abstract: A method and apparatus for managing power in a thermal couple aware system includes determining a candidate configuration mapping based upon one or more criteria, the candidate configuration mapping being a mapping of performance for a candidate configuration of processor sockets in the thermal couple aware system. The candidate configuration mapping is evaluated by comparing the candidate configuration mapping to a stored configuration. If the evaluated candidate configuration mapping provides a better metric than the stored configuration, the stored configuration is updated with the evaluated candidate configuration mapping, and programming instructions are executed in accordance with the candidate configuration mapping if no other configuration mappings are to be determined.
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公开(公告)号:US10452437B2
公开(公告)日:2019-10-22
申请号:US15192784
申请日:2016-06-24
Applicant: Advanced Micro Devices, Inc.
Inventor: Abhinandan Majumdar , Brian J. Kocoloski , Leonardo Piga , Wei Huang , Yasuko Eckert
Abstract: Systems, apparatuses, and methods for performing temperature-aware task scheduling and proactive power management. A SoC includes a plurality of processing units and a task queue storing pending tasks. The SoC calculates a thermal metric for each pending task to predict an amount of heat the pending task will generate. The SoC also determines a thermal gradient for each processing unit to predict a rate at which the processing unit's temperature will change when executing a task. The SoC also monitors a thermal margin of how far each processing unit is from reaching its thermal limit. The SoC minimizes non-uniform heat generation on the SoC by scheduling pending tasks from the task queue to the processing units based on the thermal metrics for the pending tasks, the thermal gradients of each processing unit, and the thermal margin available on each processing unit.
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公开(公告)号:US09990203B2
公开(公告)日:2018-06-05
申请号:US14981310
申请日:2015-12-28
Applicant: Advanced Micro Devices, Inc.
Inventor: Leonardo de Paula Rosa Piga , Abhinandan Majumdar , Indrani Paul , Wei Huang , Manish Arora , Joseph L. Greathouse
IPC: G06F9/30
CPC classification number: G06F9/30192 , G06F9/30014 , G06F9/30083 , G06F9/30145 , G06F11/00
Abstract: Methods, devices, and systems for capturing an accuracy of an instruction executing on a processor. An instruction may be executed on the processor, and the accuracy of the instruction may be captured using a hardware counter circuit. The accuracy of the instruction may be captured by analyzing bits of at least one value of the instruction to determine a minimum or maximum precision datatype for representing the field, and determining whether to adjust a value of the hardware counter circuit accordingly. The representation may be output to a debugger or logfile for use by a developer, or may be output to a runtime or virtual machine to automatically adjust instruction precision or gating of portions of the processor datapath.
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公开(公告)号:US10955884B2
公开(公告)日:2021-03-23
申请号:US15071643
申请日:2016-03-16
Applicant: Advanced Micro Devices, Inc.
Inventor: Wei Huang , Manish Arora , Abhinandan Majumdar , Indrani Paul , Leonardo de Paula Rosa Piga
IPC: G06F1/20 , G06F1/324 , G06F1/329 , G06F1/3296
Abstract: A method and apparatus for managing power in a thermal couple aware system includes determining a candidate configuration mapping based upon one or more criteria, the candidate configuration mapping being a mapping of performance for a candidate configuration of processor sockets in the thermal couple aware system. The candidate configuration mapping is evaluated by comparing the candidate configuration mapping to a stored configuration. If the evaluated candidate configuration mapping provides a better metric than the stored configuration, the stored configuration is updated with the evaluated candidate configuration mapping, and programming instructions are executed in accordance with the candidate configuration mapping if no other configuration mappings are to be determined.
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公开(公告)号:US20170371719A1
公开(公告)日:2017-12-28
申请号:US15192784
申请日:2016-06-24
Applicant: Advanced Micro Devices, Inc.
Inventor: Abhinandan Majumdar , Brian J. Kocoloski , Leonardo Piga , Wei Huang , Yasuko Eckert
CPC classification number: G06F9/4893 , G06F1/206 , G06F1/329 , G06F9/5094 , Y02D10/24
Abstract: Systems, apparatuses, and methods for performing temperature-aware task scheduling and proactive power management. A SoC includes a plurality of processing units and a task queue storing pending tasks. The SoC calculates a thermal metric for each pending task to predict an amount of heat the pending task will generate. The SoC also determines a thermal gradient for each processing unit to predict a rate at which the processing unit's temperature will change when executing a task. The SoC also monitors a thermal margin of how far each processing unit is from reaching its thermal limit. The SoC minimizes non-uniform heat generation on the SoC by scheduling pending tasks from the task queue to the processing units based on the thermal metrics for the pending tasks, the thermal gradients of each processing unit, and the thermal margin available on each processing unit.
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公开(公告)号:US20170371761A1
公开(公告)日:2017-12-28
申请号:US15192748
申请日:2016-06-24
Applicant: Advanced Micro Devices, Inc.
Inventor: Leonardo Piga , Brian J. Kocoloski , Wei Huang , Abhinandan Majumdar , Indrani Paul
CPC classification number: G06F11/3604 , G06F9/45516
Abstract: Systems, apparatuses, and methods for performing real-time tracking of performance targets using dynamic compilation. A performance target is specified in a service level agreement. A dynamic compiler analyzes a software application executing in real-time and determine which high-level application metrics to track. The dynamic compiler then inserts instructions into the code to increment counters associated with the metrics. A power optimization unit then utilizes the counters to determine if the system is currently meeting the performance target. If the system is exceeding the performance target, then the power optimization unit reduces the power consumption of the system while still meeting the performance target.
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公开(公告)号:US20170185409A1
公开(公告)日:2017-06-29
申请号:US14981310
申请日:2015-12-28
Applicant: Advanced Micro Devices, Inc.
Inventor: Leonardo de Paula Rosa Piga , Abhinandan Majumdar , Indrani Paul , Wei Huang , Manish Arora , Joseph L. Greathouse
IPC: G06F9/30
CPC classification number: G06F9/30192 , G06F9/30014 , G06F9/30083 , G06F9/30145 , G06F11/00
Abstract: Methods, devices, and systems for capturing an accuracy of an instruction executing on a processor. An instruction may be executed on the processor, and the accuracy of the instruction may be captured using a hardware counter circuit. The accuracy of the instruction may be captured by analyzing bits of at least one value of the instruction to determine a minimum or maximum precision datatype for representing the field, and determining whether to adjust a value of the hardware counter circuit accordingly. The representation may be output to a debugger or logfile for use by a developer, or may be output to a runtime or virtual machine to automatically adjust instruction precision or gating of portions of the processor datapath.
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