公开(公告)号：US20190244907A1

公开(公告)日：2019-08-08

申请号：US15889004

申请日：2018-02-05

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Guo-Cheng LIAO ,  Chia Ching CHEN ,  Yi Chuan DING

IPC: H01L23/538 ,  H01L23/31 ,  H01L23/552 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L21/683

CPC classification number: H01L23/5389 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/3114 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/552 ,  H01L24/19 ,  H01L24/20 ,  H01L2221/68372 ,  H01L2224/214 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3025

Abstract: A semiconductor package structure includes a first conductive structure, a second conductive structure, a first semiconductor component, a second semiconductor component and a first encapsulant. The first semiconductor component is disposed on the first conductive structure. The first conductive structure includes a first redistribution layer. The second semiconductor component is disposed on the second conductive structure. The second conductive structure includes a second redistribution layer, and the first conductive structure is electrically connected to the second conductive structure. The first encapsulant covers the first semiconductor component and the first conductive structure. A lateral surface of the first conductive structure and a lateral surface of the first encapsulant are non-coplanar.

公开(公告)号：US20240260181A1

公开(公告)日：2024-08-01

申请号：US18631017

申请日：2024-04-09

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ming-Ze LIN ,  Chia Ching CHEN ,  Yi Chuan DING

IPC: H05K1/02 ,  H01L21/48 ,  H01L23/14 ,  H01L23/498 ,  H05K1/11 ,  H05K3/46

CPC classification number: H05K1/0298 ,  H01L21/4857 ,  H01L23/145 ,  H01L23/49822 ,  H05K1/115 ,  H05K3/4623 ,  H01L2224/16225 ,  H05K2203/1438

Abstract: A semiconductor package device includes a first dielectric layer, a first interconnection layer, a second interconnection layer, and a second dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The first interconnection layer is within the first dielectric layer. The second interconnection layer is on the second surface of the first dielectric layer and extends from the second surface of the first dielectric layer into the first dielectric layer to electrically connect to the first interconnection layer. The second dielectric layer covers the second surface and the lateral surface of the first dielectric layer and the second interconnection layer.

公开(公告)号：US20200296827A1

公开(公告)日：2020-09-17

申请号：US16888316

申请日：2020-05-29

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ming-Ze LIN ,  Chia Ching CHEN ,  Yi Chuan DING

IPC: H05K1/02 ,  H05K1/11 ,  H05K3/46 ,  H01L21/48 ,  H01L23/14 ,  H01L23/498

Abstract: A semiconductor package device includes a first dielectric layer, a first interconnection layer, a second interconnection layer, and a second dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The first interconnection layer is within the first dielectric layer. The second interconnection layer is on the second surface of the first dielectric layer and extends from the second surface of the first dielectric layer into the first dielectric layer to electrically connect to the first interconnection layer. The second dielectric layer covers the second surface and the lateral surface of the first dielectric layer and the second interconnection layer.

公开(公告)号：US20220361326A1

公开(公告)日：2022-11-10

申请号：US17873088

申请日：2022-07-25

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ming-Ze LIN ,  Chia Ching CHEN ,  Yi Chuan DING

IPC: H05K1/02 ,  H05K1/11 ,  H05K3/46 ,  H01L21/48 ,  H01L23/14 ,  H01L23/498

Abstract: A semiconductor package device includes a first dielectric layer, a first interconnection layer, a second interconnection layer, and a second dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The first interconnection layer is within the first dielectric layer. The second interconnection layer is on the second surface of the first dielectric layer and extends from the second surface of the first dielectric layer into the first dielectric layer to electrically connect to the first interconnection layer. The second dielectric layer covers the second surface and the lateral surface of the first dielectric layer and the second interconnection layer.

公开(公告)号：US20180359853A1

公开(公告)日：2018-12-13

申请号：US15621964

申请日：2017-06-13

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ming-Ze LIN ,  Chia Ching CHEN ,  Yi Chuan DING

IPC: H05K1/02 ,  H05K1/11 ,  H05K3/46

Abstract: A semiconductor package device includes a first dielectric layer, a first interconnection layer, a second interconnection layer, and a second dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The first interconnection layer is within the first dielectric layer. The second interconnection layer is on the second surface of the first dielectric layer and extends from the second surface of the first dielectric layer into the first dielectric layer to electrically connect to the first interconnection layer. The second dielectric layer covers the second surface and the lateral surface of the first dielectric layer and the second interconnection layer.