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公开(公告)号：US20050088328A1
公开(公告)日：2005-04-28
申请号：US10994306
申请日：2004-11-23
申请人： Akinobu Kawamura
发明人： Akinobu Kawamura
CPC分类号： H03M7/3015 , H03M7/3022 , H03M7/3028 , H03M7/3037 , H03M7/304
摘要： The variable-order delta sigma modulator of the invention is capable of setting an optimum order in relation to a sampling frequency to be used, when using one out of plural sampling frequencies. As to the delta sigma modulator of the third order or higher, in a combination of two arbitrary continued integrators constituting the modulator is furnished a means that connects or disconnects the circuit on the second integrator side at the part of connecting the first integrator and the second integrator, or a means of switching the relation of connections. Connecting or disconnecting the circuit through the means and switching the relation of connections will set the order of the delta sigma modulator into an optimum order in relation to a sampling frequency.
摘要翻译： 当使用多个采样频率中的一个时，本发明的可变阶ΔΣ调制器能够设定与要使用的采样频率相关的最佳顺序。 对于三阶以上的ΔΣ调制器，构成调制器的两个任意的继续积分器的组合被提供了在连接第一积分器和第二积分器的一部分处连接或断开第二积分器侧的电路的装置 集成商或切换关系的手段。 通过该装置连接或断开电路并切换连接的关系将使delta-Σ调制器的顺序相对于采样频率设置为最佳顺序。
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公开(公告)号：US07129873B2
公开(公告)日：2006-10-31
申请号：US10994306
申请日：2004-11-23
申请人： Akinobu Kawamura
发明人： Akinobu Kawamura
IPC分类号： H03M3/00
CPC分类号： H03M7/3015 , H03M7/3022 , H03M7/3028 , H03M7/3037 , H03M7/304
摘要： The variable-order delta sigma modulator of the invention is capable of setting an optimum order in relation to a sampling frequency to be used, when using one out of plural sampling frequencies. As to the delta sigma modulator of the third order or higher, in a combination of two arbitrary continued integrators constituting the modulator is furnished a means that connects or disconnects the circuit on the second integrator side at the part of connecting the first integrator and the second integrator, or a means of switching the relation of connections. Connecting or disconnecting the circuit through the means and switching the relation of connections will set the order of the delta sigma modulator into an optimum order in relation to a sampling frequency.
摘要翻译： 当使用多个采样频率中的一个时，本发明的可变阶ΔΣ调制器能够设定与要使用的采样频率相关的最佳顺序。 对于三阶以上的ΔΣ调制器，构成调制器的两个任意的继续积分器的组合被提供了在连接第一积分器和第二积分器的一部分处连接或断开第二积分器侧的电路的装置 集成商或切换关系的手段。 通过该装置连接或断开电路并切换连接的关系将使delta-Σ调制器的顺序相对于采样频率设置为最佳顺序。
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公开(公告)号：US4184527A
公开(公告)日：1980-01-22
申请号：US885270
申请日：1978-03-10
申请人： Akinobu Kawamura
发明人： Akinobu Kawamura
CPC分类号： E02B15/106
摘要： A device for collecting oil floating on the surface of water which comprises a main body made of non-ventilative and flexible sheet material and transformable from a flat configuration to a three dimensional configuration and vice versa, a first nozzle with a valve operatively connected to the main body, and a plurality of hollow elements made of non-ventilative and flexible sheet material and adapted to cooperate with each other to forcibly transform the main body to a three dimensional configuration when compressed air or gas is supplied thereinto through a second nozzle with a valve operatively connected thereto.
摘要翻译： 一种用于收集浮在水面上的油的装置，包括由非通风和柔性片材制成的主体，并且可从扁平构型转换成三维构型，反之亦然，具有阀的第一喷嘴可操作地连接到 主体和多个由不通风和柔性片材制成的中空元件，并且当通过第二喷嘴将压缩空气或气体供应到其中时，彼此配合以将主体强制地变换为三维构型 阀可操作地连接到其上。
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公开(公告)号：US08654991B2
公开(公告)日：2014-02-18
申请号：US12795158
申请日：2010-06-07
申请人： Katsuyuki Ono , Akinobu Kawamura
发明人： Katsuyuki Ono , Akinobu Kawamura
CPC分类号： H03F3/45475 , H03F1/0261 , H03F3/45183 , H03F2200/03 , H03F2203/45528 , H03F2203/45536 , H03F2203/45544 , H03F2203/45548 , H03F2203/45561 , H03F2203/45594 , H03F2203/45596 , H03F2203/45618 , H03F2203/45622
摘要： An inverting amplifier which drives headphones via an output capacitor includes: an operational amplifier, an input resistor having a first terminal via which an audio signal to be amplified is received, and a second terminal connected to an inverting input terminal of the operational amplifier; and a feedback resistor having a first terminal connected to an inverting input terminal of the operational amplifier, and a second terminal connected to the output terminal. A reference voltage source generates a bias voltage Vb, and supplies it to the non-inverting input terminal. A discharging path includes a discharging resistor and a first switch arranged in series between an output terminal of the reference voltage source and an fixed voltage terminal. A second switch is arranged between the output terminal of the operational amplifier and a node on the discharging path where the electric potential is higher than it is at the discharging resistor.
摘要翻译： 通过输出电容器驱动耳机的反相放大器包括：运算放大器，具有接收要放大的音频信号的第一端子的输入电阻器和连接到运算放大器的反相输入端子的第二端子; 以及反馈电阻器，其具有连接到运算放大器的反相输入端子的第一端子和连接到输出端子的第二端子。 参考电压源产生偏置电压Vb，并将其提供给非反相输入端。 放电路径包括放电电阻器和串联布置在参考电压源的输出端子和固定电压端子之间的第一开关。 第二开关设置在运算放大器的输出端子和放电路径上的电位高于放电电阻器处的节点之间。
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公开(公告)号：US20080253585A1
公开(公告)日：2008-10-16
申请号：US11874583
申请日：2007-10-18
申请人： Akinobu Kawamura
发明人： Akinobu Kawamura
IPC分类号： H03G3/00
CPC分类号： H03G3/002 , H03F3/217 , H03F3/68 , H03F2200/03 , H03F2200/331
摘要： A zero-crossing detector detects a zero-crossing point by monitoring an amplitude of an audio signal, and generates a zero-crossing detection signal that becomes a predetermined level for every detected zero-crossing point. A timer circuit counts a clock signal, and generates a timing signal that becomes a predetermined level every time a predetermined unit transition time elapses. A volume setting unit receives the zero-crossing detection signal and the timing signal, and transits the volume from a current value to a target value in a step-wise manner. Every time the timing signal becomes the predetermined level, the volume setting unit changes the volume by a predetermined width at a transition timing at which the zero-crossing detection signal becomes a predetermined level immediately thereafter, and repeats such process to execute volume transition from the current value to the target value.
摘要翻译： 过零检测器通过监视音频信号的幅度来检测过零点，并且产生对于每个检测到的过零点成为预定电平的过零检测信号。 定时器电路对时钟信号进行计数，并且每当经过预定单位转换时间时产生成为预定水平的定时信号。 音量设定单元接收过零检测信号和定时信号，并且以逐步的方式将音量从当前值转换到目标值。 每当定时信号成为预定电平时，音量设定单元在过零检测信号立即变为预定电平的转变定时将音量改变预定的宽度，并重复执行从 当前值为目标值。
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公开(公告)号：US06839012B2
公开(公告)日：2005-01-04
申请号：US10635638
申请日：2003-08-07
申请人： Akinobu Kawamura
发明人： Akinobu Kawamura
CPC分类号： H03M7/3015 , H03M7/3022 , H03M7/3028 , H03M7/3037 , H03M7/304
摘要： The variable-order delta sigma modulator of the invention is capable of setting an optimum order in relation to a sampling frequency to be used, when using one out of plural sampling frequencies. As to the delta sigma modulator of the third order or higher, in a combination of two arbitrary continued integrators constituting the modulator is furnished a means that connects or disconnects the circuit on the second integrator side at the part of connecting the first integrator and the second integrator, or a means of switching the relation of connections. Connecting or disconnecting the circuit through the means and switching the relation of connections will set the order of the delta sigma modulator into an optimum order in relation to a sampling frequency.
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7.发明授权Semiconductor integrated circuit device having an output voltage setting function 失效具有输出电压设定功能的半导体集成电路装置公开(公告)号：US06359428B1
公开(公告)日：2002-03-19
申请号：US09605055
申请日：2000-06-28
申请人： Akinobu Kawamura
发明人： Akinobu Kawamura
IPC分类号： H03H100
CPC分类号： H03M1/765 , H03K17/693
摘要： A voltage output device outputs an analog voltage obtained by dividing a supply voltage with a plurality of resistor elements. The resistor elements are individually connected in parallel with fuse elements and switching transistors. The fuse elements have a resistance sufficiently lower than the resistor elements. The voltage output device also has a controller that controls, in accordance with an input signal fed thereto, the on/off states of the switching elements. The fuse elements connected in parallel with the transistors that are turned on remain intact without blowing, and the fuse elements connected in parallel with the transistors that are kept off blow. The fuse elements blow when a current higher than a predetermined value is passed therethrough, and this permits adjustment of the value of the output analog voltage.
摘要翻译： 电压输出装置输出通过将电源电压与多个电阻元件分开而获得的模拟电压。 电阻元件与熔丝元件和开关晶体管并联连接。 熔丝元件的电阻足够低于电阻元件。 电压输出装置还具有控制器，该控制器根据向其馈送的输入信号控制开关元件的导通/截止状态。 与导通的晶体管并联连接的熔丝元件保持原样，不会发生熔断，并且与保持断开的晶体管并联连接的熔丝元件。 当高于预定值的电流通过时，熔丝元件吹动，这允许调节输出模拟电压的值。
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8.发明授权
公开(公告)号：US5650884A
公开(公告)日：1997-07-22
申请号：US400987
申请日：1995-03-08
CPC分类号： G11B15/125 , G11B5/02 , G11B5/0086
摘要： A recording and reproducing apparatus of the present invention has a magnetic head used for both recording and reproduction. To perform the changeover between recording and reproduction in a short period of time, a first recording amplifier for supplying a recording signal is provided at one end of the magnetic head, a second recording amplifier for supplying a recording signal of a phase opposite to that of the recording signal supplied to the one end of the magnetic head is provided at the other end of the magnetic head, and a reproduction input amplifier connected to the both ends of the magnetic head is provided. The same bias voltages are supplied through first and second resistors connected to the both ends of the magnetic head.
摘要翻译： 本发明的记录和再现装置具有用于记录和再现的磁头。 为了在短时间内执行记录和再现之间的切换，在磁头的一端设置用于提供记录信号的第一记录放大器，第二记录放大器，用于提供与 提供给磁头一端的记录信号设置在磁头的另一端，并且提供连接到磁头两端的再现输入放大器。 通过连接到磁头两端的第一和第二电阻器提供相同的偏置电压。
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