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    Method for smoothing a surface of an electrode
    2.
    发明授权
    Method for smoothing a surface of an electrode 有权
    电极表面平滑化的方法

    公开(公告)号：US08756775B2

    公开(公告)日：2014-06-24

    申请号：US12547616

    申请日：2009-08-26

    Applicant: Akiyoshi Kawamura ,  Takako Sato ,  Osamu Chikagawa

    Inventor： Akiyoshi Kawamura ,  Takako Sato ,  Osamu Chikagawa

    IPC: B23P13/00

    CPC classification number: B24B31/06 ,  B24B1/04 ,  H05K1/0306 ,  H05K3/26 ,  H05K2201/0209 ,  H05K2203/025 ,  H05K2203/0285

    Abstract: A method is provided for efficiently and securely smoothing a surface of an electrode disposed on a base, such as a ceramic substrate, without damaging the electrode or the base. The electrode is fired by a non-shrinkage process using a constraining layer and is separated from the constraining layer. The base including the electrode disposed thereon is prepared and a surface of the electrode is smoothed by vibrating media such that the media are arranged to be in contact with the electrode.

    Abstract translation: 提供了一种用于有效且可靠地平滑设置在诸如陶瓷基板的基底上的电极的表面而不损坏电极或基底的方法。 电极通过使用约束层的非收缩工艺进行烧制并与约束层分离。 制备包括设置在其上的电极的基底，并且通过振动介质使电极的表面平滑，使得介质被布置成与电极接触。

    Method for manufacturing a ceramic multi-layered substrate
    6.
    发明授权
    Method for manufacturing a ceramic multi-layered substrate 有权
    陶瓷多层基板的制造方法

    公开(公告)号：US07833370B2

    公开(公告)日：2010-11-16

    申请号：US11951842

    申请日：2007-12-06

    Applicant: Akiyoshi Kawamura ,  Takayuki Tsukizawa ,  Tetsuya Ikeda ,  Osamu Chikagawa

    Inventor： Akiyoshi Kawamura ,  Takayuki Tsukizawa ,  Tetsuya Ikeda ,  Osamu Chikagawa

    IPC: C03B29/00

    CPC classification number: H05K3/0052 ,  H05K1/0272 ,  H05K1/0306 ,  H05K3/4611 ,  H05K3/4629 ,  H05K2203/302 ,  H05K2203/308

    Abstract: A method for manufacturing a ceramic multi-layered substrate includes a first step of forming a green ceramic laminate including a plurality of stacked green ceramic base layers, a second step of firing the green ceramic laminate to sinter the green ceramic layers, and a third step of separating the sintered ceramic laminate formed by firing the green ceramic laminate into a ceramic multi-layered substrate. The green ceramic base layers stacked in the first step include a separation pattern formed along separation lines, the separation pattern disappearing during firing. In the third step, the sintered ceramic laminate is separated into a plurality of ceramic multi-layered substrates separated through a cavity formed by the disappearance of the separation pattern during the firing in the second step.

    Abstract translation: 陶瓷多层基板的制造方法包括：形成包含多个层叠的生坯陶瓷基层的生坯陶瓷层叠体的第一工序;烧成生陶瓷层叠体烧结生坯陶瓷层的第二工序;第三工序 通过将生坯陶瓷层压体烧制成陶瓷多层基板而形成的烧结陶瓷层叠体。 在第一步骤中堆叠的绿色陶瓷基底层包括沿着分离线形成的分离图案，分离图案在焙烧期间消失。 在第三步骤中，烧结的陶瓷层压体被分离成多个陶瓷多层基板，其通过在第二步骤中的烧制期间由分离图案消失形成的空腔分离。

    METHOD FOR MANUFACTURING A CERAMIC MULTI-LAYERED SUBSTRATE
    7.
    发明申请
    METHOD FOR MANUFACTURING A CERAMIC MULTI-LAYERED SUBSTRATE 有权
    制造陶瓷多层基板的方法

    公开(公告)号：US20080142147A1

    公开(公告)日：2008-06-19

    申请号：US11951842

    申请日：2007-12-06

    Applicant: Akiyoshi Kawamura ,  Takayuki Tsukizawa ,  Tetsuya Ikeda ,  Osamu Chikagawa

    Inventor： Akiyoshi Kawamura ,  Takayuki Tsukizawa ,  Tetsuya Ikeda ,  Osamu Chikagawa

    IPC: B32B37/06

    CPC classification number: H05K3/0052 ,  H05K1/0272 ,  H05K1/0306 ,  H05K3/4611 ,  H05K3/4629 ,  H05K2203/302 ,  H05K2203/308

    Abstract: A method for accurately and easily manufacturing a ceramic multi-layered substrate includes a first step of forming a green ceramic laminate including a plurality of stacked green ceramic base layers, a second step of firing the green ceramic laminate to sinter the green ceramic layers, and a third step of separating the sintered ceramic laminate formed by firing the green ceramic laminate into a ceramic multi-layered substrate. The green ceramic base layers stacked in the first step include a separation pattern formed along separation lines, the separation pattern disappearing during firing. In the third step, the sintered ceramic laminate is separated into a plurality of ceramic multi-layered substrates separated through a cavity formed by the disappearance of the separation pattern during the firing in the second step.

    Abstract translation: 陶瓷多层基板的精确且容易地制造方法包括：形成包含多个堆叠的绿色陶瓷基底层的生坯陶瓷层叠体的第一工序;烧成生陶瓷层叠体烧结生坯陶瓷层的第二工序;以及 将通过将生坯陶瓷层压体烧制成陶瓷多层基板形成的烧结陶瓷层叠体的第三步骤。 在第一步骤中堆叠的绿色陶瓷基底层包括沿着分离线形成的分离图案，分离图案在焙烧期间消失。 在第三步骤中，烧结的陶瓷层压体被分离成多个陶瓷多层基板，其通过在第二步骤中的烧制期间由分离图案消失形成的空腔分离。

    Method and computer program for identifying performance tuning opportunities in parallel programs
    8.
    发明申请
    Method and computer program for identifying performance tuning opportunities in parallel programs 审中-公开
    用于在并行程序中识别性能调优机会的方法和计算机程序

    公开(公告)号：US20150278078A1

    公开(公告)日：2015-10-01

    申请号：US14224240

    申请日：2014-03-25

    Applicant: Akiyoshi Kawamura

    Inventor： Akiyoshi Kawamura

    IPC: G06F11/36 ,  G06F9/44

    Abstract: From time to time we parallelize programs to improve execution time. In order to do so, one creates a number of execution units which can be executed concurrently. These execution units eventually are executed on hardware. It is often not clear what is the right number of execution units in achieving maximum runtime performance; too little or too much of them does not help in improving program execution time. The present invention presents a method and associated computer program for identifying performance tuning opportunities in parallel programs. The key information used by the method is execution start and end time of program regions such as blocks, functions or methods. This information can be visualized using VCD viewer and can be queried to check if a particular timing property is satisfied. The information then is used in identifying tuning opportunities and provides guides in parallelizing programs.

    Abstract translation: 我们不时地并行化程序来提高执行时间。 为了做到这一点，创建了可以同时执行的多个执行单元。 这些执行单元最终在硬件上执行。 在实现最大运行时性能时，通常不清楚正确的执行单元数量是多少？ 他们太少或太多不利于提高程序执行时间。 本发明提出了一种用于在并行程序中识别性能调优机会的方法和相关联的计算机程序。 该方法使用的关键信息是程序区域的执行开始和结束时间，如块，函数或方法。 该信息可以使用VCD查看器进行可视化，可以查询是否满足特定的时间属性。 然后，该信息用于识别调优机会，并提供并行化程序的指导。

    Method for producing multilayer ceramic substrate
    9.
    发明授权
    Method for producing multilayer ceramic substrate 有权
    多层陶瓷基板的制造方法

    公开(公告)号：US08105453B2

    公开(公告)日：2012-01-31

    申请号：US12029545

    申请日：2008-02-12

    Applicant: Akiyoshi Kawamura ,  Takayuki Tsukizawa ,  Tetsuya Ikeda

    Inventor： Akiyoshi Kawamura ,  Takayuki Tsukizawa ,  Tetsuya Ikeda

    IPC: C03B29/00 ,  B32B13/04 ,  B32B3/14

    CPC classification number: H05K3/0052 ,  H01L21/4807 ,  H05K1/0272 ,  H05K1/0306 ,  H05K3/4614 ,  H05K3/4629 ,  H05K2201/0909 ,  H05K2201/09163 ,  H05K2201/09781 ,  Y10T428/166

    Abstract: In a method for producing a multilayer ceramic substrate, a green ceramic laminate includes green conductive patterns arranged on a plurality of ceramic green sheets and portions to be formed into a plurality of multilayer ceramic substrates. Boundary-defining conductive patterns are arranged on the ceramic green sheets and along boundaries of the multilayer ceramic substrates. The boundary-defining conductive patterns have firing shrinkage characteristics that are different from those of the ceramic green sheets. During firing of the green ceramic laminate, cavities adjacent to edges of the boundary-defining conductive patterns are formed. A sintered ceramic laminate is divided at edges passing through the cavities.

    Abstract translation: 在多层陶瓷基板的制造方法中，生坯陶瓷层叠体包括布置在多个陶瓷生片上的绿色导电图案和形成多个多层陶瓷基板的部分。 边界限定导电图案布置在陶瓷生片上并沿着多层陶瓷基片的边界。 边界限定导电图案具有与陶瓷生片不同的焙烧收缩特性。 在焙烧生坯陶瓷层压板期间，形成与边界限定导电图案的边缘相邻的空腔。 烧结的陶瓷层压体在通过空腔的边缘处分开。

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