Low noise, low distortion MOS amplifier circuit
    3.
    发明授权
    Low noise, low distortion MOS amplifier circuit 失效
    低噪声,低失真的MOS放大电路

    公开(公告)号:US5351011A

    公开(公告)日:1994-09-27

    申请号:US152566

    申请日:1993-11-12

    CPC分类号: H03F3/45076 H03F1/3211

    摘要: In the case of amplifier circuits realised in modern MOS technology, non-linear distortion occurs as a result of the high field strengths in the channel region due to the small dimensions. This distortion is eliminated and noise is reduced in that the amplifier circuit comprises a first series combination of first and second MOS transistors, and a second series combination identical with the first series combination and forming a long tailed pair circuit with the latter. The long tailed pair circuit includes an additional differential amplifier having its output connected to the gate electrode of a load transistor of the long tailed pair circuit by way of a voltage divider. The transistors in the long tailed pair circuit are mutually identical.

    摘要翻译: 在现代MOS技术中实现的放大器电路的情况下,由于尺寸小而导致沟道区域中的高场强的发生导致非线性失真。 这种失真被消除并且降低噪声,因为放大器电路包括第一和第二MOS晶体管的第一串联组合和与第一串联组合相同的第二串联组合,并与后者形成长尾对电路。 长尾对电路包括附加的差分放大器,其输出通过分压器连接到长尾对电路的负载晶体管的栅电极。 长尾对电路中的晶体管是相同的。

    Integrated circuit having a sense amplifier
    4.
    发明授权
    Integrated circuit having a sense amplifier 失效
    具有读出放大器的集成电路

    公开(公告)号:US5253137A

    公开(公告)日:1993-10-12

    申请号:US707556

    申请日:1991-05-30

    申请人: Evert Seevinck

    发明人: Evert Seevinck

    IPC分类号: G11C7/06 G11C11/419 G11C13/00

    CPC分类号: G11C11/419 G11C7/065

    摘要: An integrated circuit includes a sense amplifier which has an equalizing effect on voltages on the inputs of the sense amplifier, in particular during readout of the sense amplifier. The sense amplifier includes a parallel connection of a first and second current branch, each current branch including a control transistor, the source of which is connected to a relevant input, and the gate of which is connected to the drain of the control transistor in the other current branch, and a load transistor, whose gate receives a selection signal being connected in each said current branch in series with the control transistor. During readout, the gate of the load transistor is driven so as to make the channel of the load transistor conductive.

    摘要翻译: 集成电路包括对感测放大器的输入上的电压具有均衡效应的读出放大器,特别是在读出放大器的读出期间。 感测放大器包括第一和第二电流分支的并联连接,每个电流分支包括控制晶体管,其源极连接到相关输入端,其栅极连接到控制晶体管的漏极 其他电流分支和负载晶体管,其栅极接收与控制晶体管串联连接在每个所述电流分支中的选择信号。 在读出期间,负载晶体管的栅极被驱动以使负载晶体管的沟道导通。

    Companding current-mode transconductor-C integrator
    5.
    发明授权
    Companding current-mode transconductor-C integrator 失效
    组合电流模式转换器-C集成器

    公开(公告)号:US5189321A

    公开(公告)日:1993-02-23

    申请号:US766890

    申请日:1991-09-27

    申请人: Evert Seevinck

    发明人: Evert Seevinck

    IPC分类号: G06G7/184

    CPC分类号: G06G7/184

    摘要: In a current-mode transconductor-C integrator, the non-linearity of the voltage-to-current conversion of a transconductor is corrected by means of a differentiator which supplies a current (i.sub.d) which is proportional to the derivative of a current (i.sub.f) which in turn is proportional to the transconductor output current (i.sub.out), with respect to the transconductor control (v). An input current (i.sub.in) is divided by the current (i.sub.d) by means of a current divider. The resultant quotient current (i.sub.q) is applied to an integrating capacitor across which a voltage (v) is built up. This voltage is converted into the output current (i.sub.out) by the transconductor. This results in an output current (i.sub.out) which is linearly proportional to the integral of the input current (i.sub.in) without the distortion usually caused by the non-linear voltage-to-current characteristic of the transconductor.

    Current-source arrangement
    6.
    发明授权
    Current-source arrangement 失效
    电流源安排

    公开(公告)号:US4605892A

    公开(公告)日:1986-08-12

    申请号:US705763

    申请日:1985-02-26

    IPC分类号: G05F3/26 G05F3/22 G05F3/20

    CPC分类号: G05F3/227

    摘要: A current-source arrangement supplying a current which increases directly proportionally to the supply voltage (V.sub.S) and which is suitable for operation with supply voltages above approximately 0.7 V, comprises a first resistor (R.sub.10 =R) in which a current (V.sub.S -V.sub.BE)/R flows, which current is supplied by a first transistor (T.sub.10) via a first current-mirror circuit (T.sub.11, T.sub.12) and a second current-mirror circuit (T.sub.13, T.sub.14). A second resistor (R.sub.2 =R) is arranged in parallel with the base-emitter junction of the input transistor (T.sub.11) of the first current-mirror circuit (T.sub.11, T.sub.12), through which second resistor (R.sub.2) a current V.sub.BE /R flows which is supplied by the first transistor (T.sub.10) via the collector-base interconnection of the input transistor (T.sub.11). The total current flowing through the first transistor (T.sub.10) is then equal to V.sub.S /R. This current can be taken from the collector terminals (15A, 15B) of the transistors (T.sub.15A, T.sub.15B), whose base-emitter junctions are connected in parallel with the base-emitter junction of the first transistor (T.sub.10).

    摘要翻译: 提供电流源装置包括:第一电阻器(R10 = R),其中电流(VS-VBE)与电源电压(VS)直接成比例地增加并且适合于电源电压高于约0.7V的操作 )/ R流动,该电流由第一晶体管(T10)经由第一电流镜电路(T11,T12)和第二电流镜电路(T13,T14)提供。 第二电阻器(R2 = R)与第一电流镜电路(T11,T12)的输入晶体管(T11)的基极 - 发射极并联排列,第二电阻器(R2)通过电流VBE / R 由第一晶体管(T10)经由输入晶体管(T11)的集电极 - 基极互连提供的流。 流过第一晶体管(T10)的总电流等于VS / R。 该电流可以从其基极 - 发射结与第一晶体管(T10)的基极 - 发射极并联连接的晶体管(T15A,T15B)的集电极端子(15A,15B)获取。

    Current mode signaling in electronic data processing circuit
    7.
    发明授权
    Current mode signaling in electronic data processing circuit 有权
    电子数据处理电路中的电流模式信号

    公开(公告)号:US07212034B2

    公开(公告)日:2007-05-01

    申请号:US10525865

    申请日:2003-07-31

    IPC分类号: H03K19/0175

    摘要: An electronic data processing circuit uses current mode signalling on a communication conductor, wherein a receiver supplies current to the communication conductor to try and keep a voltage on the conductor constant and measures the current that is needed to do so. A transition coding circuit is coupled between a data source circuit and the communication conductor, for driving the communication conductor in a first state in pulses in response to transitions in the logic signal and in a second state outside the pulses. The level that is used for indicating no change is selected so the current that needs to be supplied by the receiver is smaller when no change is signalled than when a change is signalled. Preferably only a nearly zero quiescent current is needed when there is no change.

    摘要翻译: 电子数据处理电路在通信导体上使用电流模式信号,其中接收器向通信导体提供电流以尝试并保持导体上的电压恒定并且测量所需的电流。 转换编码电路耦合在数据源电路和通信导体之间,用于响应于逻辑信号中的转换和在脉冲之外的第二状态以脉冲方式驱动通信导体处于第一状态。 选择用于指示没有变化的电平,所以当没有发出变化时,接收器需要提供的电流比发出变化时更小。 当没有变化时,最好只需要几乎零静态电流。

    Integrated memory comprising a sense amplifier
    8.
    发明授权
    Integrated memory comprising a sense amplifier 失效
    集成存储器,包括读出放大器

    公开(公告)号:US5241504A

    公开(公告)日:1993-08-31

    申请号:US927781

    申请日:1992-08-10

    申请人: Evert Seevinck

    发明人: Evert Seevinck

    IPC分类号: G11C7/06 G11C11/419

    CPC分类号: G11C7/062 G11C11/419

    摘要: An integrated memory includes a sense amplifier which has a parallel connection of a first and a second current branch, each current branch including channels of a control transistor and a load transistor which are coupled via a junction point, the junction points in each current branch being cross-wise coupled to the gates of the load transistors in the other current branch, and the junction points constituting outputs of the sense amplifier. The control and load transistors are of the same conductivity type, with each load transistor being connected in a source-follower configuration with its associated control transistor. As a result, the control transistors will be operative in the saturation region at all times and can be driven to full output, so that an integrated memory incorporating the invention is faster.

    摘要翻译: 集成存储器包括具有第一和第二电流分支的并联连接的读出放大器,每个电流分支包括通过接合点耦合的控制晶体管和负载晶体管的通道,每个电流分支中的连接点为 交叉耦合到另一个电流分支中的负载晶体管的栅极,以及构成读出放大器输出的连接点。 控制和负载晶体管具有相同的导电类型,每个负载晶体管以源跟随器配置与其相关联的控制晶体管连接。 结果,控制晶体管总是在饱和区域中工作,并且可以被驱动到完全输出,使得结合本发明的集成存储器更快。

    Current amplifier
    9.
    发明授权
    Current amplifier 失效
    电流放大器

    公开(公告)号:US4980650A

    公开(公告)日:1990-12-25

    申请号:US392635

    申请日:1989-08-11

    IPC分类号: G05F3/26 H03F3/18 H03F3/343

    CPC分类号: H03F3/343 G05F3/265

    摘要: A current amplifier has an input terminal (1) for receiving an input current and an output terminal (2) for supplying an output current. A first transistor (T.sub.1) has a base-emitter junction coupled to the input terminal and a second transistor (T.sub.2) has a collector coupled to the output terminal and an emitter arranged in series with a voltage source (4). The series arrangement of the voltage source and the base-emitter junction of the second transistor is arranged in parallel with the base-emitter junction of the first transistor. The first transistor is of the NPN conductivity type and the second transistor is of the PNP conductivity type. The low internal series resistance of the NPN transistor T.sub.1 develops a relatively small voltage drop so that the attenuated output current (I.sub.out) is a linear function of the input current over a wide range of input currents. This results in a current-sourcing attenuating current mirror having a far better linearity than a current amplifier in which the first and second transistors are both of the PNP conductivity type.