公开(公告)号：US08954902B2

公开(公告)日：2015-02-10

申请号：US13028144

申请日：2011-02-15

申请人： Michael A. Stuber ,  Christopher N. Brindle ,  Dylan J. Kelly ,  Clint L. Kemerling ,  George P. Imthurn ,  Mark L. Burgener ,  Alexander Dribinsky ,  Tae Youn Kim

发明人： Michael A. Stuber ,  Christopher N. Brindle ,  Dylan J. Kelly ,  Clint L. Kemerling ,  George P. Imthurn ,  Mark L. Burgener ,  Alexander Dribinsky ,  Tae Youn Kim

IPC分类号： G06F17/50 ,  H03K17/16 ,  H01L27/12 ,  H01L29/49 ,  H01L29/786

CPC分类号： H01L29/78615 ,  H01L27/1203 ,  H01L29/4908 ,  H01L29/78651 ,  H01L29/78654 ,  H01L29/78657 ,  H03K17/162

摘要： A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET. The SOI MOSFET is adapted to have a selected average time-to-breakdown, responsive to the first and second determinations, and the circuit is operated using techniques for accumulated charge control operatively coupled to the SOI MOSFET. In one embodiment, the accumulated charge control techniques include using an accumulated charge sink operatively coupled to the SOI MOSFET body.

摘要翻译： 公开了一种用于使用累积电荷控制（ACC）技术来改善绝缘体上半导体（SOI）金属氧化物 - 硅场效应晶体管（MOSFET）器件的栅极氧化可靠性的方法和装置。 该方法和装置适于去除，减少或以其他方式控制SOI MOSFET中的累积电荷，从而产生FET性能特性的改进。 在一个实施例中，电路包括以累积电荷状态运行的MOSFET，以及用于控制可操作地耦合到SOI MOSFET的累积电荷的装置。 首先确定不受控制的累积电荷对SOI MOSFET的栅极氧化物的时间依赖介电击穿（TDDB）的影响。 第二次确定SOI MOSFET的栅极氧化物的受控累积电荷对TDDB的影响。 SOI MOSFET适于具有响应于第一和第二确定的选择的平均时间分辨率，并且使用用于可操作地耦合到SOI MOSFET的累积电荷控制的技术来操作电路。 在一个实施例中，累积的电荷控制技术包括使用可操作地耦合到SOI MOSFET体的累积电荷宿。

公开(公告)号：US08143935B2

公开(公告)日：2012-03-27

申请号：US11881816

申请日：2007-07-26

申请人： Alexander Dribinsky ,  Tae Youn Kim ,  Dylan J. Kelly ,  Christopher N. Brindle

发明人： Alexander Dribinsky ,  Tae Youn Kim ,  Dylan J. Kelly ,  Christopher N. Brindle

IPC分类号： H03K17/00

摘要： A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch. In one embodiment, an SOI RF switch comprises a plurality of switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate. Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated. In one embodiment, the charge injection control elements comprise resistors. In another embodiment, the charge injection control elements comprise transistors. A method for controlling charge injection in a switch circuit is disclosed whereby injected charge is generated at resistively-isolated nodes between series coupled switching transistors, and the injected charge is conveyed to at least one node of the switch circuit that is not resistively-isolated.

公开(公告)号：US20110227637A1

公开(公告)日：2011-09-22

申请号：US13028144

申请日：2011-02-15

申请人： Michael A. Stuber ,  Christopher N. Brindle ,  Dylan J. Kelly ,  Clint L. Kemerling ,  George P. Imthurn ,  Mark L. Burgener ,  Alexander Dribinsky ,  Tae Youn Kim

发明人： Michael A. Stuber ,  Christopher N. Brindle ,  Dylan J. Kelly ,  Clint L. Kemerling ,  George P. Imthurn ,  Mark L. Burgener ,  Alexander Dribinsky ,  Tae Youn Kim

IPC分类号： G05F1/10 ,  H01L29/772

CPC分类号： H01L29/78615 ,  H01L27/1203 ,  H01L29/4908 ,  H01L29/78651 ,  H01L29/78654 ,  H01L29/78657 ,  H03K17/162

摘要： A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET. The SOI MOSFET is adapted to have a selected average time-to-breakdown, responsive to the first and second determinations, and the circuit is operated using techniques for accumulated charge control operatively coupled to the SOI MOSFET. In one embodiment, the accumulated charge control techniques include using an accumulated charge sink operatively coupled to the SOI MOSFET body.

摘要翻译： 公开了一种用于使用累积电荷控制（ACC）技术来改善绝缘体上半导体（SOI）金属氧化物 - 硅场效应晶体管（MOSFET）器件的栅极氧化可靠性的方法和装置。 该方法和装置适于去除，减少或以其他方式控制SOI MOSFET中的累积电荷，从而产生FET性能特性的改进。 在一个实施例中，电路包括以累积电荷状态运行的MOSFET，以及用于控制可操作地耦合到SOI MOSFET的累积电荷的装置。 首先确定不受控制的累积电荷对SOI MOSFET的栅极氧化物的时间依赖介电击穿（TDDB）的影响。 第二次确定SOI MOSFET的栅极氧化物的受控累积电荷对TDDB的影响。 SOI MOSFET适于具有响应于第一和第二确定的选择的平均时间分辨率，并且使用用于可操作地耦合到SOI MOSFET的累积电荷控制的技术来操作电路。 在一个实施例中，累积的电荷控制技术包括使用可操作地耦合到SOI MOSFET体的累积电荷宿。

公开(公告)号：US07890891B2

公开(公告)日：2011-02-15

申请号：US11520912

申请日：2006-09-14

申请人： Michael A. Stuber ,  Christopher N. Brindle ,  Dylan J. Kelly ,  Clint L. Kemerling ,  George P. Imthurn ,  Robert B. Welstand ,  Mark L. Burgener ,  Alexander Dribinsky ,  Tae Youn Kim

发明人： Michael A. Stuber ,  Christopher N. Brindle ,  Dylan J. Kelly ,  Clint L. Kemerling ,  George P. Imthurn ,  Robert B. Welstand ,  Mark L. Burgener ,  Alexander Dribinsky ,  Tae Youn Kim

IPC分类号： G06F17/50

CPC分类号： H01L29/78615 ,  H01L27/1203 ,  H01L29/4908 ,  H01L29/78651 ,  H01L29/78654 ,  H01L29/78657 ,  H03K17/162

摘要： A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET. The SOI MOSFET is adapted to have a selected average time-to-breakdown, responsive to the first and second determinations, and the circuit is operated using techniques for accumulated charge control operatively coupled to the SOI MOSFET. In one embodiment, the accumulated charge control techniques include using an accumulated charge sink operatively coupled to the SOI MOSFET body.

摘要翻译： 公开了一种用于使用累积电荷控制（ACC）技术来改善绝缘体上半导体（SOI）金属氧化物 - 硅场效应晶体管（MOSFET）器件的栅极氧化可靠性的方法和装置。 该方法和装置适于去除，减少或以其他方式控制SOI MOSFET中的累积电荷，从而产生FET性能特性的改进。 在一个实施例中，电路包括以累积电荷状态运行的MOSFET，以及用于控制可操作地耦合到SOI MOSFET的累积电荷的装置。 首先确定不受控制的累积电荷对SOI MOSFET的栅极氧化物的时间依赖介电击穿（TDDB）的影响。 第二次确定SOI MOSFET的栅极氧化物的受控累积电荷对TDDB的影响。 SOI MOSFET适于具有响应于第一和第二确定的选择的平均时间分辨率，并且使用用于可操作地耦合到SOI MOSFET的累积电荷控制的技术来操作电路。 在一个实施例中，累积的电荷控制技术包括使用可操作地耦合到SOI MOSFET体的累积电荷宿。

公开(公告)号：US20120169398A1

公开(公告)日：2012-07-05

申请号：US13412529

申请日：2012-03-05

申请人： Christopher N. Brindle ,  Michael A. Stuber ,  Dylan J. Kelly ,  Clint L. Kemerling ,  George P. Imthurn ,  Robert B. Welstand ,  Mark L. Burgener

发明人： Christopher N. Brindle ,  Michael A. Stuber ,  Dylan J. Kelly ,  Clint L. Kemerling ,  George P. Imthurn ,  Robert B. Welstand ,  Mark L. Burgener

IPC分类号： H03K17/687

CPC分类号： H03K17/162 ,  H01L29/0649 ,  H01L29/1095 ,  H01L29/78609 ,  H01L29/78615 ,  H01L29/78681 ,  H01L29/78684 ,  H03K17/687 ,  H03K2217/0018

摘要： A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOT MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.

摘要翻译： 公开了一种用于改善使用累积电荷吸收（ACS）的MOSFET器件的线性特性的方法和装置。 该方法和装置适于去除，减少或以其他方式控制SOI MOSFET中的累积电荷，从而产生FET性能特性的改进。 在一个示例性实施例中，具有至少一个SOI MOSFET的电路被配置为在累积电荷状态下操作。 当FET在累积电荷状态下工作时，可操作地耦合到SOI MOSFET的主体的累积电荷吸收器消除，去除或以其他方式控制累积电荷，从而降低寄生偏离态源极至漏极间电容的非线性 的SOT MOSFET。 在利用改进的SOI MOSFET器件实现的RF开关电路中，当SOI MOSFET在累积电荷状态下工作时，通过去除或以其他方式控制累积电荷来减小谐波和互调失真。

公开(公告)号：US08129787B2

公开(公告)日：2012-03-06

申请号：US13053211

申请日：2011-03-22

申请人： Christopher N. Brindle ,  Michael A. Stuber ,  Dylan J. Kelly ,  Clint L. Kemerling ,  George P. Imthurn ,  Robert B. Welstand ,  Mark L. Burgener

发明人： Christopher N. Brindle ,  Michael A. Stuber ,  Dylan J. Kelly ,  Clint L. Kemerling ,  George P. Imthurn ,  Robert B. Welstand ,  Mark L. Burgener

IPC分类号： H01L27/12

CPC分类号： H03K17/162 ,  H01L29/0649 ,  H01L29/1095 ,  H01L29/78609 ,  H01L29/78615 ,  H01L29/78681 ,  H01L29/78684 ,  H03K17/687 ,  H03K2217/0018

摘要： A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOI MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.

摘要翻译： 公开了一种用于改善使用累积电荷吸收（ACS）的MOSFET器件的线性特性的方法和装置。 该方法和装置适于去除，减少或以其他方式控制SOI MOSFET中的累积电荷，从而产生FET性能特性的改进。 在一个示例性实施例中，具有至少一个SOI MOSFET的电路被配置为在累积电荷状态下操作。 当FET在累积电荷状态下工作时，可操作地耦合到SOI MOSFET的主体的累积电荷宿消除，去除或以其他方式控制累积电荷，从而降低寄生偏离态源极至漏极间电容的非线性 的SOI MOSFET。 在利用改进的SOI MOSFET器件实现的RF开关电路中，当SOI MOSFET在累积电荷状态下工作时，通过去除或以其他方式控制累积电荷来减小谐波和互调失真。

公开(公告)号：US20110169550A1

公开(公告)日：2011-07-14

申请号：US13053211

申请日：2011-03-22

申请人： Christopher N. Brindle ,  Michael A. Stuber ,  Dylan J. Kelly ,  Clint L. Kemerling ,  George P. Imthurn ,  Robert B. Welstand ,  Mark L. Burgener

发明人： Christopher N. Brindle ,  Michael A. Stuber ,  Dylan J. Kelly ,  Clint L. Kemerling ,  George P. Imthurn ,  Robert B. Welstand ,  Mark L. Burgener

IPC分类号： H03K17/687 ,  H01L29/78 ,  H03K3/01

CPC分类号： H03K17/162 ,  H01L29/0649 ,  H01L29/1095 ,  H01L29/78609 ,  H01L29/78615 ,  H01L29/78681 ,  H01L29/78684 ,  H03K17/687 ,  H03K2217/0018

摘要： A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOI MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.

摘要翻译： 公开了一种用于改善使用累积电荷吸收（ACS）的MOSFET器件的线性特性的方法和装置。 该方法和装置适于去除，减少或以其他方式控制SOI MOSFET中的累积电荷，从而产生FET性能特性的改进。 在一个示例性实施例中，具有至少一个SOI MOSFET的电路被配置为在累积电荷状态下操作。 当FET在累积电荷状态下工作时，可操作地耦合到SOI MOSFET的主体的累积电荷吸收器消除，去除或以其他方式控制累积电荷，从而降低寄生偏离态源极至漏极间电容的非线性 的SOI MOSFET。 在利用改进的SOI MOSFET器件实现的RF开关电路中，当SOI MOSFET在累积电荷状态下工作时，通过去除或以其他方式控制累积电荷来减小谐波和互调失真。

公开(公告)号：US07910993B2

公开(公告)日：2011-03-22

申请号：US11484370

申请日：2006-07-10

申请人： Christopher N. Brindle ,  Michael A. Stuber ,  Dylan J. Kelly ,  Clint L. Kemerling ,  George P. Imthurn ,  Robert B. Welstand ,  Mark L. Burgener

发明人： Christopher N. Brindle ,  Michael A. Stuber ,  Dylan J. Kelly ,  Clint L. Kemerling ,  George P. Imthurn ,  Robert B. Welstand ,  Mark L. Burgener

IPC分类号： H01L27/12

CPC分类号： H03K17/162 ,  H01L29/0649 ,  H01L29/1095 ,  H01L29/78609 ,  H01L29/78615 ,  H01L29/78681 ,  H01L29/78684 ,  H03K17/687 ,  H03K2217/0018

摘要： A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOI MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.

摘要翻译： 公开了一种用于改善使用累积电荷吸收（ACS）的MOSFET器件的线性特性的方法和装置。 该方法和装置适于去除，减少或以其他方式控制SOI MOSFET中的累积电荷，从而产生FET性能特性的改进。 在一个示例性实施例中，具有至少一个SOI MOSFET的电路被配置为在累积电荷状态下操作。 当FET在累积电荷状态下工作时，可操作地耦合到SOI MOSFET的主体的累积电荷宿消除，去除或以其他方式控制累积电荷，从而降低寄生偏置电源 - 漏极电容的非线性 的SOI MOSFET。 在利用改进的SOI MOSFET器件实现的RF开关电路中，当SOI MOSFET在累积电荷状态下工作时，通过去除或以其他方式控制累积电荷来减小谐波和互调失真。

公开(公告)号：US08405147B2

公开(公告)日：2013-03-26

申请号：US13412529

申请日：2012-03-05

申请人： Christopher N. Brindle ,  Michael A. Stuber ,  Dylan J. Kelly ,  Clint L. Kemerling ,  George P. Imthurn ,  Robert B. Welstand ,  Mark L. Burgener

发明人： Christopher N. Brindle ,  Michael A. Stuber ,  Dylan J. Kelly ,  Clint L. Kemerling ,  George P. Imthurn ,  Robert B. Welstand ,  Mark L. Burgener

IPC分类号： H04B1/28 ,  H01L29/76 ,  H01L7/20 ,  H04M1/00

CPC分类号： H03K17/162 ,  H01L29/0649 ,  H01L29/1095 ,  H01L29/78609 ,  H01L29/78615 ,  H01L29/78681 ,  H01L29/78684 ,  H03K17/687 ,  H03K2217/0018

摘要： A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOT MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.

摘要翻译： 公开了一种用于改善使用累积电荷吸收（ACS）的MOSFET器件的线性特性的方法和装置。 该方法和装置适于去除，减少或以其他方式控制SOI MOSFET中的累积电荷，从而产生FET性能特性的改进。 在一个示例性实施例中，具有至少一个SOI MOSFET的电路被配置为在累积电荷状态下操作。 当FET在累积电荷状态下工作时，可操作地耦合到SOI MOSFET的主体的累积电荷宿消除，去除或以其他方式控制累积电荷，从而降低寄生偏离态源极至漏极间电容的非线性 的SOT MOSFET。 在利用改进的SOI MOSFET器件实现的RF开关电路中，当SOI MOSFET在累积电荷状态下工作时，通过去除或以其他方式控制累积电荷来减小谐波和互调失真。

公开(公告)号：US08174303B2

公开(公告)日：2012-05-08

申请号：US12460442

申请日：2009-07-17

申请人： Tae Youn Kim ,  Robert Mark Englekirk ,  Dylan J. Kelly

发明人： Tae Youn Kim ,  Robert Mark Englekirk ,  Dylan J. Kelly

IPC分类号： H03L5/00

摘要： A level shifter, or method, producing a final output from a driver supplied by a high-side source driver providing VDD or common, and a low-side source driver providing common or VSS. A delay is introduced to prevent a source driver output at common from beginning to transition toward a supply rail until a delaying source driver at a rail begins transitioning toward common. The level shifter may be single-ended or differential, and the delaying source driver may be coupled to the same final output driver as is the delayed source driver, or may be coupled to a different final output driver. The level shifter may have a second level shifter front end stage, which may have high-side and low-side intermediate source driver outputs coupled by a capacitor, and/or may couple one of the supplies to all intermediate source drivers via a common impedance or current limit Zs.