Methods and structures for increasing the allowable die size in TMV packages

    公开(公告)号:US10347562B1

    公开(公告)日:2019-07-09

    申请号:US15663024

    申请日:2017-07-28

    IPC分类号: H01L23/48

    摘要: A package includes a substrate having an electronic component flip chip mounted thereto by flip chip bumps. The electronic component includes an active surface and an inactive surface. Electrically conductive columns (TSV) extend through the electronic component between the active surface and the inactive surface. A RDL structure is coupled to the inactive surface, the RDL structure redistributing the pattern of the electrically conductive columns at the inactive surface to a pattern of inactive surface RDL lands. The inactive surface RDL lands are exposed through via apertures of a package body. By using the inactive surface of the electronic component to distribute the inactive surface RDL lands, the allowable size of the electronic component is maximized.

    Fine pitch copper pillar package and method

    公开(公告)号:US10418318B1

    公开(公告)日:2019-09-17

    申请号:US16276151

    申请日:2019-02-14

    摘要: An electronic component package includes a substrate having an upper surface. Traces on the upper surface of the substrate extend in a longitudinal direction. The traces have a first latitudinal width in a latitudinal direction, the latitudinal direction being perpendicular to the longitudinal direction. Rectangular copper pillars are attached to bond pads of an electronic component, the copper pillars having a longitudinal length and a latitudinal second width. The latitudinal second width of the copper pillars is equal to and aligned with the first latitudinal width of the traces. Further, the longitudinal length of the copper pillars is parallel with the longitudinal direction of the trace and equal to the length of the bond pads. The copper pillars are mounted to the traces with solder joints.

    METHODS AND STRUCTURES FOR INCREASING THE ALLOWABLE DIE SIZE IN TMV PACKAGES

    公开(公告)号:US20190371706A1

    公开(公告)日:2019-12-05

    申请号:US16373357

    申请日:2019-04-02

    IPC分类号: H01L23/48

    摘要: A package includes a substrate having an electronic component flip chip mounted thereto by flip chip bumps. The electronic component includes an active surface and an inactive surface. Electrically conductive columns (TSV) extend through the electronic component between the active surface and the inactive surface. A RDL structure is coupled to the inactive surface, the RDL structure redistributing the pattern of the electrically conductive columns at the inactive surface to a pattern of inactive surface RDL lands. The inactive surface RDL lands are exposed through via apertures of a package body. By using the inactive surface of the electronic component to distribute the inactive surface RDL lands, the allowable size of the electronic component is maximized.

    Fine pitch copper pillar package and method

    公开(公告)号:US10224270B1

    公开(公告)日:2019-03-05

    申请号:US15284242

    申请日:2016-10-03

    摘要: An electronic component package includes a substrate having an upper surface. Traces on the upper surface of the substrate extend in a longitudinal direction. The traces have a first latitudinal width in a latitudinal direction, the latitudinal direction being perpendicular to the longitudinal direction. Rectangular copper pillars are attached to bond pads of an electronic component, the copper pillars having a longitudinal length and a latitudinal second width. The latitudinal second width of the copper pillars is equal to and aligned with the first latitudinal width of the traces. Further, the longitudinal length of the copper pillars is parallel with the longitudinal direction of the trace and equal to the length of the bond pads. The copper pillars are mounted to the traces with solder joints.

    FINE PITCH COPPER PILLAR PACKAGE AND METHOD
    7.
    发明申请

    公开(公告)号:US20200219802A1

    公开(公告)日:2020-07-09

    申请号:US16571565

    申请日:2019-09-16

    摘要: An electronic component package includes a substrate having an upper surface. Traces on the upper surface of the substrate extend in a longitudinal direction. The traces have a first latitudinal width in a latitudinal direction, the latitudinal direction being perpendicular to the longitudinal direction. Rectangular copper pillars are attached to bond pads of an electronic component, the copper pillars having a longitudinal length and a latitudinal second width. The latitudinal second width of the copper pillars is equal to and aligned with the first latitudinal width of the traces. Further, the longitudinal length of the copper pillars is parallel with the longitudinal direction of the trace and equal to the length of the bond pads. The copper pillars are mounted to the traces with solder joints.