VOLTAGE REGULATOR WITH TIME-AWARE CURRENT REPORTING

    公开(公告)号:US20180364285A1

    公开(公告)日:2018-12-20

    申请号:US16009059

    申请日:2018-06-14

    IPC分类号: G01R19/25 H02M3/158

    摘要: Systems and methods for providing an indication of an output current of a voltage regulator applied to a load at an indicated time to a processor. An indication of the output current of a voltage regulator is determined in response to a clock signal received from a clock source and a frame number of a frame is determined from the clock source. The indication of the current output and the frame number of the associated frame are provided to the processor.

    Head up display mechanism
    7.
    发明授权
    Head up display mechanism 失效
    抬头显示机制

    公开(公告)号:US07570429B2

    公开(公告)日:2009-08-04

    申请号:US11595501

    申请日:2006-11-09

    IPC分类号: G02B27/14

    CPC分类号: G02B27/0149 G02B2027/0156

    摘要: A Head up display (HUD) calibration assembly is designed for coupling a HUD system with the inner walls of a vehicle, and adjusting the orientation of the HUD system. The HUD calibration assembly includes a mounting tray for coupling with a HUD projector and with a HUD combiner deployment mechanism. The mounting tray includes a plurality of adjustment interface planes, each of which includes a locking screw opening, and a plurality of adjustment assemblies, each coupled with the vehicle in a respective separate anchoring location, locking the mounting tray at the desired position and orientation.

    摘要翻译: 抬头显示(HUD)校准组件设计用于将HUD系统与车辆内壁相连,并调整HUD系统的方向。 HUD校准组件包括用于与HUD投影仪和HUD组合器部署机构耦合的安装托盘。 安装托盘包括多个调节接口平面,每个调整接口平面包括锁定螺钉开口和多个调节组件,每个调节组件在相应的单独的锚固位置中与车辆联接,将安装托盘锁定在期望的位置和方向。

    Fetching all or portion of instructions in memory line up to branch instruction based on branch prediction and size indicator stored in branch target buffer indexed by fetch address
    10.
    发明授权
    Fetching all or portion of instructions in memory line up to branch instruction based on branch prediction and size indicator stored in branch target buffer indexed by fetch address 有权
    根据存储在由抓取地址索引的分支目标缓冲区中的分支预测和大小指示符,将内存行中的所有或部分指令取出到分支指令

    公开(公告)号:US07552314B2

    公开(公告)日:2009-06-23

    申请号:US11252029

    申请日:2005-10-17

    IPC分类号: G06F9/38

    CPC分类号: G06F9/3844

    摘要: The invention provides a method and apparatus for branch prediction in a processor. A fetch-block branch target buffer is used in an early stage of pipeline processing before the instruction is decoded, which stores information about a control transfer instruction for a “block” of instruction memory. The block of instruction memory is represented by a block entry in the fetch-block branch target buffer. The block entry represents one recorded control-transfer instruction (such as a branch instruction) and a set of sequentially preceding instructions, up to a fixed maximum length N. Indexing into the fetch-block branch target buffer yields an answer whether the block entry represents memory that contains a previously executed a control-transfer instruction, a length value representing the amount of memory that contains the instructions represented by the block, and an indicator for the type of control-transfer instruction that terminates the block, its target and outcome. Both the decode and execution pipelines include correction capabilities for modifying the block branch target buffer dependent on the results of the instruction decode and execution and can include a mechanism to correct malformed instructions.

    摘要翻译: 本发明提供了一种用于在处理器中进行分支预测的方法和装置。 在解码指令之前,在流水线处理的早期阶段使用取出块分支目标缓冲器,其存储关于指令存储器的“块”的控制传送指令的信息。 指令存储器块由提取块分支目标缓冲器中的块条目表示。 块条目表示一个记录的控制传输指令(例如分支指令)和一组先前的指令,直到固定的最大长度N.索引到提取块分支目标缓冲器中产生一个答案,无论块条目是否表示 存储器,其包含先前执行的控制传递指令,表示包含由该块表示的指令的存储器的量的长度值以及终止块,其目标和结果的控制传送指令的类型的指示符。 解码和执行流水线都包括用于根据指令解码和执行的结果修改块分支目标缓冲器的校正能力,并且可以包括校正畸形指令的机制。