公开(公告)号：US20070296056A1

公开(公告)日：2007-12-27

申请号：US11426591

申请日：2006-06-27

申请人： Anthony L. Coyle ,  Reynaldo C. Javier ,  Jeffrey G. Holloway

发明人： Anthony L. Coyle ,  Reynaldo C. Javier ,  Jeffrey G. Holloway

IPC分类号： H01L29/00

CPC分类号： H01L24/85 ,  H01F17/0006 ,  H01F17/02 ,  H01L23/66 ,  H01L24/45 ,  H01L24/48 ,  H01L2223/6611 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/48092 ,  H01L2224/4813 ,  H01L2224/48599 ,  H01L2224/85 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19042 ,  H01L2924/19104 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/30107 ,  H01L2924/00014

摘要： An electronic device has a semiconductor chip (101) with a surface and an electric circuit including terminals on the surface. The circuit has a first (103) and a second terminal (104) with a metallurgical composition for wire bonding. The chip has a conductive wire (120) above the chip surface, which has a length and a first and a second end; the first end is attached to the first terminal and the second end to the second terminal. The wire is shaped to form at least one sequence of a concave and a convex portion. The sequence may be configured to form a loop, or multiple wire loops resulting in a spiraling wire coil. The number, shape, and spatial sequence of the loops control the electrical inductance of the wire; the inductance is selected to fine-tune the high frequency characteristics of the circuit.

摘要翻译： 电子设备具有表面和包括端子在内的电路的半导体芯片（101）。 电路具有用于引线接合的冶金组合物的第一（103）和第二端子（104）。 芯片具有在芯片表面上方的导线（120），其具有长度和第一和第二端; 第一端附接到第一端子，第二端部连接到第二端子。 导线成形为形成至少一个凹部和凸部的序列。 该顺序可以被配置为形成环路，或者多个线环形成螺旋线圈。 回路的数量，形状和空间顺序控制电线的电感; 选择电感来微调电路的高频特性。

公开(公告)号：US20110248392A1

公开(公告)日：2011-10-13

申请号：US12902306

申请日：2010-10-12

申请人： Reynaldo C. Javier ,  Sreenivasan K. Koduri

发明人： Reynaldo C. Javier ,  Sreenivasan K. Koduri

IPC分类号： H01L23/495

CPC分类号： H01L23/4951 ,  H01L21/4828 ,  H01L23/3107 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49582 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/05554 ,  H01L2224/32245 ,  H01L2224/48095 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2224/45099 ,  H01L2924/00012

摘要： A ball grid array device (100) based on a metallic leadframe (110) that has the footprint of a BGA package with terminals (112) in a full two-dimensional array, and combines the structure of a leadframe with the function of a substrate. At least one terminal (112a) is at the center of the device bottom. The terminals and leads (111) are made of metal having a greater thickness at the terminals than at the leads. The terminals may have a solderable surface. A semiconductor chip (120) is attached to the leadframe surface opposite the terminals, extending across adjacent leads.

摘要翻译： 一种基于金属引线框架（110）的球栅阵列器件（100），其具有完全二维阵列中具有端子（112）的BGA封装的覆盖区，并且将引线框架的结构与衬底的功能相结合 。 至少一个终端（112a）位于设备底部的中心。 端子和引线（111）由端子处的厚度大于导线的金属制成。 端子可以具有可焊接表面。 半导体芯片（120）被附接到与端子相对的引线框架表面，延伸穿过相邻引线。