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公开(公告)号:US20180197846A1
公开(公告)日:2018-07-12
申请号:US15911398
申请日:2018-03-05
发明人: Chih-Hua Chen , Chen-Shien Chen , Ching-Wen Hsiao
IPC分类号: H01L25/00 , H01L23/00 , H01L25/18 , H01L25/065 , H01L21/48 , H01L21/66 , H01L23/498
CPC分类号: H01L25/50 , H01L21/4853 , H01L22/14 , H01L23/13 , H01L23/49805 , H01L23/49811 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/49833 , H01L23/64 , H01L24/14 , H01L24/16 , H01L24/17 , H01L25/0655 , H01L25/105 , H01L25/16 , H01L25/18 , H01L2224/13005 , H01L2224/131 , H01L2224/1403 , H01L2224/16145 , H01L2224/16238 , H01L2224/1703 , H01L2224/81815 , H01L2924/12042 , H01L2924/1305 , H01L2924/13091 , H01L2924/15192 , H01L2924/15311 , H01L2924/181 , H01L2924/19107 , H01L2924/00 , H01L2924/00014 , H01L2924/20751 , H01L2924/20755 , H01L2924/20756 , H01L2924/2076 , H01L2924/014
摘要: A semiconductor package includes a package substrate. A redistribution structure is bonded to the package substrate. A bottommost surface of the redistribution structure is lower than a topmost surface of the package substrate. A conductive connector electrically couples the redistribution structure to the package substrate. The conductive connector physically contacts a sidewall of the redistribution structure. A first integrated circuit die is bonded to the redistribution structure through first bonding structures and is bonded to the package substrate through second bonding structures. The first bonding structures and the second bonding structures have different sizes.
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公开(公告)号:US20180090463A1
公开(公告)日:2018-03-29
申请号:US15816568
申请日:2017-11-17
发明人: Yukihiro SATOU , Toshiyuki HATA
IPC分类号: H01L23/00 , H01L29/78 , H01L23/31 , H01L23/495
CPC分类号: H01L24/49 , H01L23/3107 , H01L23/3142 , H01L23/4952 , H01L23/49524 , H01L23/49562 , H01L24/06 , H01L24/37 , H01L24/40 , H01L24/45 , H01L24/48 , H01L24/97 , H01L29/7827 , H01L2224/02166 , H01L2224/04034 , H01L2224/04042 , H01L2224/05124 , H01L2224/05155 , H01L2224/05553 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/0603 , H01L2224/37124 , H01L2224/40091 , H01L2224/40245 , H01L2224/40247 , H01L2224/45014 , H01L2224/45015 , H01L2224/45124 , H01L2224/48091 , H01L2224/48247 , H01L2224/4846 , H01L2224/48472 , H01L2224/48724 , H01L2224/48739 , H01L2224/48744 , H01L2224/4903 , H01L2224/49051 , H01L2224/49111 , H01L2224/4912 , H01L2224/49171 , H01L2224/49175 , H01L2224/49431 , H01L2224/73221 , H01L2224/8385 , H01L2224/85 , H01L2224/97 , H01L2924/00014 , H01L2924/00015 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10161 , H01L2924/12042 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/1811 , H01L2924/2075 , H01L2924/20752 , H01L2924/20753 , H01L2924/20754 , H01L2924/20755 , H01L2924/20756 , H01L2924/20757 , H01L2924/20758 , H01L2924/20759 , H01L2924/2076 , H01L2924/00 , H01L2924/00012 , H01L2924/206
摘要: A semiconductor device includes a header, a semiconductor chip fixed to the header constituting a MOSFET, and a sealing body of insulating resin which covers the semiconductor chip, the header and the like, and further includes a drain lead contiguously formed with the header and projects from one side surface of the sealing body, and a source lead and a gate lead which project in parallel from one side surface of the sealing body, and wires which are positioned in the inside of the sealing body and connect electrodes on an upper surface of the semiconductor chip and the source lead and the gate lead, with a gate electrode pad arranged at a position from the gate lead and the source lead farther than a source electrode pad.
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公开(公告)号:US09899302B2
公开(公告)日:2018-02-20
申请号:US15597359
申请日:2017-05-17
发明人: Dean Fernando , Roel Barbosa , Toshio Takahashi
IPC分类号: H01L23/495 , H01L23/34 , H01L25/16 , H01L23/00 , H01L23/31
CPC分类号: H01L23/49575 , H01L23/3107 , H01L23/34 , H01L23/49513 , H01L23/4952 , H01L23/49541 , H01L23/49548 , H01L23/49562 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/16 , H01L2224/0603 , H01L2224/29101 , H01L2224/2929 , H01L2224/29339 , H01L2224/32245 , H01L2224/45015 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/4903 , H01L2224/4911 , H01L2224/49171 , H01L2224/73265 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/1305 , H01L2924/13055 , H01L2924/13064 , H01L2924/13091 , H01L2924/181 , H01L2924/20753 , H01L2924/3011 , H01L2924/30111 , H01L2924/00 , H01L2924/3512 , H01L2924/20755 , H01L2924/00012
摘要: According to an exemplary implementation, a semiconductor package includes a multi-phase power inverter having power switches and situated on a leadframe of the semiconductor package. The semiconductor package further includes a temperature sensor situated on the leadframe, where the temperature sensor is configured to generate a sensed temperature of the power switches. The semiconductor package also includes a driver circuit configured to drive the power switches of the multi-phase power inverter responsive to the sensed temperature. The temperature sensor can be on a common IC with the driver circuit. Furthermore, the semiconductor package can include an over-temperature protection circuit configured to provide over-temperature protection to the multi-phase power inverter using the sensed temperature.
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公开(公告)号:US09859242B2
公开(公告)日:2018-01-02
申请号:US15419924
申请日:2017-01-30
发明人: Hsien-Wei Chen , Yi-Wen Wu
CPC分类号: H01L24/11 , H01L21/0214 , H01L21/0217 , H01L21/02271 , H01L21/768 , H01L23/3114 , H01L23/3171 , H01L23/3192 , H01L23/564 , H01L24/03 , H01L24/05 , H01L24/13 , H01L2224/0231 , H01L2224/02311 , H01L2224/0239 , H01L2224/024 , H01L2224/0345 , H01L2224/03452 , H01L2224/0346 , H01L2224/0401 , H01L2224/05008 , H01L2224/05022 , H01L2224/05082 , H01L2224/05111 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05181 , H01L2224/05572 , H01L2224/05611 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05681 , H01L2224/05686 , H01L2224/1146 , H01L2224/11849 , H01L2224/13005 , H01L2224/13022 , H01L2224/13023 , H01L2224/13024 , H01L2224/131 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/16227 , H01L2224/16237 , H01L2224/81011 , H01L2224/81191 , H01L2224/81411 , H01L2224/81413 , H01L2224/81416 , H01L2224/81439 , H01L2224/81447 , H01L2224/81455 , H01L2224/81815 , H01L2224/8191 , H01L2924/00014 , H01L2924/01013 , H01L2924/01029 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/12042 , H01L2924/20755 , H01L2924/20756 , H01L2924/20757 , H01L2924/20758 , H01L2924/20759 , H01L2924/2076 , H01L2224/05552 , H01L2924/00
摘要: A semiconductor device including a dielectric layer formed on the surface of a post-passivation interconnect (PPI) structures. A polymer layer is formed on the dielectric layer and patterned with an opening to expose a portion of the dielectric layer. The exposed portion of the dielectric layer is then removed to expose a portion of the PPI structure. A solder bump is then formed over and electrically connected to the first portion of the PPI structure.
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公开(公告)号:US20170250127A1
公开(公告)日:2017-08-31
申请号:US15597359
申请日:2017-05-17
发明人: Dean Fernando , Roel Barbosa , Toshio Takahashi
IPC分类号: H01L23/495 , H01L25/16 , H01L23/34
CPC分类号: H01L23/49575 , H01L23/3107 , H01L23/34 , H01L23/49513 , H01L23/4952 , H01L23/49541 , H01L23/49548 , H01L23/49562 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/16 , H01L2224/0603 , H01L2224/29101 , H01L2224/2929 , H01L2224/29339 , H01L2224/32245 , H01L2224/45015 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/4903 , H01L2224/4911 , H01L2224/49171 , H01L2224/73265 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/1305 , H01L2924/13055 , H01L2924/13064 , H01L2924/13091 , H01L2924/181 , H01L2924/20753 , H01L2924/3011 , H01L2924/30111 , H01L2924/00 , H01L2924/3512 , H01L2924/20755 , H01L2924/00012
摘要: According to an exemplary implementation, a semiconductor package includes a multi-phase power inverter having power switches and situated on a leadframe of the semiconductor package. The semiconductor package further includes a temperature sensor situated on the leadframe, where the temperature sensor is configured to generate a sensed temperature of the power switches. The semiconductor package also includes a driver circuit configured to drive the power switches of the multi-phase power inverter responsive to the sensed temperature. The temperature sensor can be on a common IC with the driver circuit. Furthermore, the semiconductor package can include an over-temperature protection circuit configured to provide over-temperature protection to the multi-phase power inverter using the sensed temperature.
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公开(公告)号:US20170236813A1
公开(公告)日:2017-08-17
申请号:US15585971
申请日:2017-05-03
发明人: Chih-Hua Chen , Chen-Shien Chen , Ching-Wen Hsiao
IPC分类号: H01L25/00 , H01L25/18 , H01L23/498 , H01L21/48 , H01L21/66 , H01L23/00 , H01L25/065
CPC分类号: H01L25/50 , H01L21/4853 , H01L22/14 , H01L23/13 , H01L23/49805 , H01L23/49811 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/49833 , H01L23/64 , H01L24/14 , H01L24/16 , H01L24/17 , H01L25/0655 , H01L25/105 , H01L25/16 , H01L25/18 , H01L2224/13005 , H01L2224/131 , H01L2224/1403 , H01L2224/16145 , H01L2224/16238 , H01L2224/1703 , H01L2224/81815 , H01L2924/12042 , H01L2924/1305 , H01L2924/13091 , H01L2924/15192 , H01L2924/15311 , H01L2924/181 , H01L2924/19107 , H01L2924/00 , H01L2924/00014 , H01L2924/20751 , H01L2924/20755 , H01L2924/20756 , H01L2924/2076 , H01L2924/014
摘要: Embodiments of mechanisms for forming a die package with multiple packaged dies on a package substrate use an interconnect substrate to provide electrical connections between dies and the package substrate. The usage of the interconnect substrate enables cost reduction because it is cheaper to make than an interposer with through silicon vias (TSVs). The interconnect substrate also enables dies with different sizes of bump structures to be packaged in the same die package.
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公开(公告)号:US09728527B2
公开(公告)日:2017-08-08
申请号:US14925807
申请日:2015-10-28
申请人: Invensas Corporation
发明人: Cyprian Emeka Uzoh , Rajesh Katkar
IPC分类号: H01L23/48 , H01L25/00 , H01L23/538 , H01L23/00 , H01L23/498 , H01L21/48 , H01L25/065 , H01L21/311 , H01L21/56 , H01L21/768
CPC分类号: H01L25/50 , H01L21/31111 , H01L21/4853 , H01L21/563 , H01L21/76898 , H01L23/49811 , H01L23/5384 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/17 , H01L24/24 , H01L24/32 , H01L24/33 , H01L24/43 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/81 , H01L24/85 , H01L24/89 , H01L24/94 , H01L24/97 , H01L25/0657 , H01L2224/02311 , H01L2224/02317 , H01L2224/02371 , H01L2224/02372 , H01L2224/0239 , H01L2224/0331 , H01L2224/0332 , H01L2224/0333 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/03464 , H01L2224/0347 , H01L2224/03614 , H01L2224/0391 , H01L2224/03912 , H01L2224/03914 , H01L2224/0401 , H01L2224/04042 , H01L2224/05111 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05169 , H01L2224/05184 , H01L2224/05547 , H01L2224/05565 , H01L2224/05568 , H01L2224/05569 , H01L2224/05611 , H01L2224/05616 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05669 , H01L2224/05684 , H01L2224/08146 , H01L2224/0823 , H01L2224/1134 , H01L2224/11462 , H01L2224/11464 , H01L2224/1147 , H01L2224/11903 , H01L2224/1191 , H01L2224/13022 , H01L2224/13023 , H01L2224/13082 , H01L2224/131 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13169 , H01L2224/13184 , H01L2224/13565 , H01L2224/13616 , H01L2224/1403 , H01L2224/14131 , H01L2224/14134 , H01L2224/16145 , H01L2224/16146 , H01L2224/16148 , H01L2224/16227 , H01L2224/17181 , H01L2224/24147 , H01L2224/24227 , H01L2224/244 , H01L2224/32145 , H01L2224/32225 , H01L2224/3303 , H01L2224/33181 , H01L2224/45015 , H01L2224/45147 , H01L2224/45565 , H01L2224/4805 , H01L2224/48108 , H01L2224/48149 , H01L2224/4903 , H01L2224/49426 , H01L2224/73201 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/81192 , H01L2224/81193 , H01L2224/81825 , H01L2224/94 , H01L2224/97 , H01L2225/06506 , H01L2225/0651 , H01L2225/06524 , H01L2225/06548 , H01L2924/00014 , H01L2924/01322 , H01L2924/12042 , H01L2924/15192 , H01L2924/15311 , H01L2924/15787 , H01L2924/15788 , H01L2924/16152 , H01L2924/16251 , H01L2924/181 , H01L2924/19107 , H01L2924/381 , H01L2924/3841 , H01L2924/386 , H01L2924/00 , H01L2924/01029 , H01L2924/014 , H01L2924/00012 , H01L2924/01074 , H01L2924/01028 , H01L2924/01082 , H01L2224/05 , H01L2224/13 , H01L2224/16225 , H01L2224/81 , H01L2224/45616 , H01L2924/20751 , H01L2924/20752 , H01L2924/20753 , H01L2924/20754 , H01L2924/20755 , H01L2924/20756 , H01L2924/20757 , H01L2924/20758 , H01L2924/20759 , H01L2924/2076 , H01L2224/45099
摘要: An apparatus relating generally to a substrate is disclosed. In such an apparatus, a first bond via array has first wires extending from a surface of the substrate. A second bond via array has second wires extending from the surface of the substrate. The first bond via array is disposed at least partially within the second bond via array. The first wires of the first bond via array are of a first height. The second wires of the second bond via array are of a second height greater than the first height for coupling of at least one die to the first bond via array at least partially disposed within the second bond via array.
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公开(公告)号:US20170117243A1
公开(公告)日:2017-04-27
申请号:US15332533
申请日:2016-10-24
申请人: Invensas Corporation
发明人: Rajesh Katkar , Gabriel Z. Guevara , Xuan Li , Cyprian Emeka Uzoh , Guilian Gao , Liang Wang
CPC分类号: H01L24/16 , H01L21/565 , H01L23/315 , H01L24/27 , H01L24/32 , H01L24/49 , H01L24/81 , H01L24/85 , H01L25/105 , H01L25/50 , H01L2224/13109 , H01L2224/13111 , H01L2224/1319 , H01L2224/16111 , H01L2224/16227 , H01L2224/32225 , H01L2224/45015 , H01L2224/45147 , H01L2224/48227 , H01L2224/85355 , H01L2225/1023 , H01L2225/1058 , H01L2225/1082 , H01L2924/15311 , H01L2924/19107 , H01L2924/00014 , H01L2924/20751 , H01L2924/20752 , H01L2924/20753 , H01L2924/20754 , H01L2924/20755
摘要: A microelectronic package can include a substrate having a first surface and a second surface opposite therefrom, the substrate having a first conductive element at the first surface, and a plurality of wire bonds, each of the wire bonds having a base electrically connected to a corresponding one of the first conductive elements and having a tip remote from the base, each wire bond having edge surfaces extending from the tip toward the base. The microelectronic package can also include an encapsulation having a major surface facing away from the first surface of the substrate, the encapsulation having a recess extending from the major surface in a direction toward the first surface of the substrate, the tip of a first one of the wire bonds being disposed within the recess, and an electrically conductive layer overlying an inner surface of the encapsulation exposed within the recess, the electrically conductive layer overlying and electrically connected with the tip of the first one of the wire bonds.
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公开(公告)号:US20170117231A1
公开(公告)日:2017-04-27
申请号:US15344990
申请日:2016-11-07
申请人: Invensas Corporation
发明人: Abiola Awujoola , Zhuowen Sun , Wael Zohni , Ashok S. Prabhu , Willmar Subido
IPC分类号: H01L23/552 , H01L23/498 , H01L25/065 , H01L23/00
CPC分类号: H01L23/552 , H01L23/49811 , H01L24/06 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/03 , H01L25/0652 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L2224/04042 , H01L2224/1134 , H01L2224/12105 , H01L2224/13076 , H01L2224/13082 , H01L2224/131 , H01L2224/16145 , H01L2224/16227 , H01L2224/16265 , H01L2224/17051 , H01L2224/17181 , H01L2224/215 , H01L2224/2919 , H01L2224/32225 , H01L2224/45015 , H01L2224/48105 , H01L2224/48227 , H01L2224/48472 , H01L2224/4942 , H01L2224/73204 , H01L2224/73207 , H01L2224/73227 , H01L2224/73253 , H01L2224/73259 , H01L2224/73265 , H01L2224/73267 , H01L2224/85444 , H01L2224/85455 , H01L2225/06513 , H01L2225/06517 , H01L2225/1023 , H01L2225/1052 , H01L2924/00014 , H01L2924/01322 , H01L2924/1205 , H01L2924/1206 , H01L2924/1207 , H01L2924/181 , H01L2924/19105 , H01L2924/19107 , H01L2924/3025 , H01L2224/45099 , H01L2924/2075 , H01L2924/20751 , H01L2924/20752 , H01L2924/20753 , H01L2924/20754 , H01L2924/20755 , H01L2924/00012 , H01L2924/014 , H01L2924/00 , H01L2224/05599
摘要: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.
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公开(公告)号:US09620954B2
公开(公告)日:2017-04-11
申请号:US14152723
申请日:2014-01-10
发明人: Dean Fernando , Roel Barbosa , Toshio Takahashi
IPC分类号: H02M7/5387 , H02H7/122 , H01L23/495 , H01L23/31 , H01L23/00
CPC分类号: H02H7/122 , H01L23/3107 , H01L23/49513 , H01L23/4952 , H01L23/49541 , H01L23/49548 , H01L23/49562 , H01L23/49575 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2224/05554 , H01L2224/0603 , H01L2224/29101 , H01L2224/2929 , H01L2224/29339 , H01L2224/32245 , H01L2224/45015 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/4903 , H01L2224/49111 , H01L2224/49171 , H01L2224/73265 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/1305 , H01L2924/13055 , H01L2924/13064 , H01L2924/13091 , H01L2924/181 , H01L2924/3011 , H01L2924/30111 , H02M7/5387 , H01L2924/00014 , H01L2924/00 , H01L2924/3512 , H01L2924/20753 , H01L2924/20755 , H01L2924/00012
摘要: According to an exemplary implementation, a semiconductor package includes a multi-phase power inverter having power switches and situated on a leadframe of the semiconductor package. The semiconductor package further includes an over-temperature protection circuit configured to reduce current through the power switches based on multiple temperature threshold values of the power switches and a sensed temperature of the power switches. The over-temperature protection circuit can be configured to enter first and second modes based on the multiple temperature threshold values and the sensed temperature, where the second mode reduces current through the power switches to a greater extent than the first mode.
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