公开(公告)号：US09651593B2

公开(公告)日：2017-05-16

申请号：US14268945

申请日：2014-05-02

Applicant: Apple Inc.

Inventor： Nicholas A. Sims ,  Jeffrey J. Terlizzi ,  Alexei Kosut ,  Timothy Johnson ,  Barry Corlett

IPC: G01R27/02 ,  H02J7/04 ,  H02M7/02 ,  G01L1/20 ,  H02J7/00

CPC classification number: G01R27/02 ,  G01L1/205 ,  H02J7/042 ,  H02J2007/0062 ,  H02J2007/0096 ,  H02M7/02 ,  H02M7/53803 ,  H02M7/53846 ,  H02M7/539

Abstract: An alternating current (AC) to direct current (DC) power converter may have a connector with a pair of power supply contacts and a pair of data contacts. An electronic device may be connected to the connector of the power converter. The power converter may supply DC power to the electronic device using the power supply contacts. The power converter may include control circuitry that has a resistor coupled across the data contacts. When the electronic device and the power converter are connected to each other, each may advertise to the other that capabilities are present that exceed industry standards. At the same time, standard-compliant discovery operations may be performed to probe the value of the resistance of the resistor that is coupled across the data contacts. When extended capabilities are discovered, extended functions may be performed including accelerated charging functions and data communications functions.

公开(公告)号：US20130212318A1

公开(公告)日：2013-08-15

申请号：US13725671

申请日：2012-12-21

Applicant: Apple Inc.

Inventor： Tahoma Toelkes ,  Nir Jacob Wakrat ,  Kenneth L. Herman ,  Barry Corlett ,  Vadim Khmelnitsky ,  Anthony Fai ,  Daniel Jeffrey Post ,  Hsiao Thio

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  G06F12/0607 ,  G06F2212/1016 ,  G06F2212/7208

Abstract: The disclosed architecture uses address mapping to map a block address on a host interface to an internal block address of a non-volatile memory (NVM) device. The block address is mapped to an internal chip select for selecting a Concurrently Addressable Unit (CAU) identified by the block address. The disclosed architecture supports generic NVM commands for read, write, erase and get status operations. The architecture also supports an extended command set for supporting read and write operations that leverage a multiple CAU architecture.

Abstract translation: 所公开的架构使用地址映射将主机接口上的块地址映射到非易失性存储器（NVM）设备的内部块地址。 块地址映射到用于选择由块地址标识的可并行寻址单元（CAU）的内部芯片选择。 所公开的架构支持用于读取，写入，擦除和获取状态操作的通用NVM命令。 该架构还支持扩展命令集，以支持利用多个CAU架构的读写操作。

公开(公告)号：US10677827B2

公开(公告)日：2020-06-09

申请号：US15489467

申请日：2017-04-17

Applicant: Apple Inc.

Inventor： Nicholas A. Sims ,  Jeffrey J. Terlizzi ,  Alexei Kosut ,  Timothy Johnson ,  Barry Corlett

IPC: H02J7/04 ,  H02J7/00 ,  G01R27/02 ,  H02M7/02 ,  G01L1/20 ,  H02M7/538 ,  H02M7/53846 ,  H02M7/539

Abstract: An alternating current (AC) to direct current (DC) power converter may have a connector with a pair of power supply contacts and a pair of data contacts. An electronic device may be connected to the connector of the power converter. The power converter may supply DC power to the electronic device using the power supply contacts. The power converter may include control circuitry that has a resistor coupled across the data contacts. When the electronic device and the power converter are connected to each other, each may advertise to the other that capabilities are present that exceed industry standards. At the same time, standard-compliant discovery operations may be performed to probe the value of the resistance of the resistor that is coupled across the data contacts. When extended capabilities are discovered, extended functions may be performed including accelerated charging functions and data communications functions.

公开(公告)号：US20130131852A1

公开(公告)日：2013-05-23

申请号：US13745480

申请日：2013-01-18

Applicant: Apple Inc.

Inventor： David G. Conroy ,  Steve Schell ,  Barry Corlett ,  Neil D. Warren ,  Aram Lindahl

IPC: G06F17/00

CPC classification number: G06F17/00 ,  G06F1/3203 ,  G06F1/3237 ,  G06F1/3287 ,  G06F1/3293 ,  G06F13/124 ,  G06F21/10 ,  G06F21/71 ,  G06F2221/0735 ,  Y02D10/122 ,  Y02D10/128 ,  Y02D10/171 ,  Y02D50/20

Abstract: A media processing system and device with improved power usage characteristics, improved audio functionality and improved media security is provided. Embodiments of the media processing system include an audio processing subsystem that operates independently of the host processor for long periods of time, allowing the host processor to enter a low power state while the audio data is being processed. Other aspects of the media processing system provide for enhanced audio effects such as mixing stored audio samples into real-time telephone audio. Still other aspects of the media processing system provide for improved media security due to the isolation of decrypted audio data from the host processor.

Abstract translation: 提供了具有改进的功率使用特性，改进的音频功能和改进的媒体安全性的媒体处理系统和设备。 媒体处理系统的实施例包括音频处理子系统，其独立于主机处理器长时间运行，允许主机处理器在处理音频数据时进入低功率状态。 媒体处理系统的其他方面提供增强的音频效果，例如将存储的音频样本混合成实时电话音频。 媒体处理系统的其它方面由于从主机处理器隔离解密的音频数据而提供改善的媒体安全性。

公开(公告)号：US20170219641A1

公开(公告)日：2017-08-03

申请号：US15489467

申请日：2017-04-17

Applicant: Apple Inc.

Inventor： Nicholas A. Sims ,  Jeffrey J. Terlizzi ,  Alexei Kosut ,  Timothy Johnson ,  Barry Corlett

IPC: G01R27/02 ,  H02M7/53846 ,  H02M7/539 ,  H02M7/538

Abstract: An alternating current (AC) to direct current (DC) power converter may have a connector with a pair of power supply contacts and a pair of data contacts. An electronic device may be connected to the connector of the power converter. The power converter may supply DC power to the electronic device using the power supply contacts. The power converter may include control circuitry that has a resistor coupled across the data contacts. When the electronic device and the power converter are connected to each other, each may advertise to the other that capabilities are present that exceed industry standards. At the same time, standard-compliant discovery operations may be performed to probe the value of the resistance of the resistor that is coupled across the data contacts. When extended capabilities are discovered, extended functions may be performed including accelerated charging functions and data communications functions.

公开(公告)号：US08862851B2

公开(公告)日：2014-10-14

申请号：US13725671

申请日：2012-12-21

Applicant: Apple Inc.

Inventor： Tahoma Toelkes ,  Nir Jacob Wakrat ,  Kenneth L Herman ,  Barry Corlett ,  Vadim Khmelnitsky ,  Anthony Fai ,  Daniel Jeffrey Post ,  Hsiao Thio

IPC: G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G06F12/02 ,  G06F12/06

CPC classification number: G06F12/0246 ,  G06F12/0607 ,  G06F2212/1016 ,  G06F2212/7208

Abstract: The disclosed architecture uses address mapping to map a block address on a host interface to an internal block address of a non-volatile memory (NVM) device. The block address is mapped to an internal chip select for selecting a Concurrently Addressable Unit (CAU) identified by the block address. The disclosed architecture supports generic NVM commands for read, write, erase and get status operations. The architecture also supports an extended command set for supporting read and write operations that leverage a multiple CAU architecture.

Abstract translation: 所公开的架构使用地址映射将主机接口上的块地址映射到非易失性存储器（NVM）设备的内部块地址。 块地址映射到用于选择由块地址标识的可并行寻址单元（CAU）的内部芯片选择。 所公开的架构支持用于读取，写入，擦除和获取状态操作的通用NVM命令。 该架构还支持扩展命令集，以支持利用多个CAU架构的读写操作。

公开(公告)号：US20140239985A1

公开(公告)日：2014-08-28

申请号：US14268945

申请日：2014-05-02

Applicant: Apple Inc.

Inventor： Nicholas A. Sims ,  Jeffrey J. Terlizzi ,  Alexei Kosut ,  Timothy Johnson ,  Barry Corlett

IPC: G01R27/02

CPC classification number: G01R27/02 ,  G01L1/205 ,  H02J7/042 ,  H02J2007/0062 ,  H02J2007/0096 ,  H02M7/02 ,  H02M7/53803 ,  H02M7/53846 ,  H02M7/539

Abstract: An alternating current (AC) to direct current (DC) power converter may have a connector with a pair of power supply contacts and a pair of data contacts. An electronic device may be connected to the connector of the power converter. The power converter may supply DC power to the electronic device using the power supply contacts. The power converter may include control circuitry that has a resistor coupled across the data contacts. When the electronic device and the power converter are connected to each other, each may advertise to the other that capabilities are present that exceed industry standards. At the same time, standard-compliant discovery operations may be performed to probe the value of the resistance of the resistor that is coupled across the data contacts. When extended capabilities are discovered, extended functions may be performed including accelerated charging functions and data communications functions.

Abstract translation: 直流（DC）电力转换器的交流（AC）可以具有与一对电源触点和一对数据触点的连接器。 电子设备可以连接到功率转换器的连接器。 电源转换器可以使用电源触点向电子设备提供直流电源。 功率转换器可以包括具有耦合在数据触点上的电阻的控制电路。 当电子设备和电源转换器彼此连接时，每个可以向另一个通告超出行业标准的能力。 同时，可以执行符合标准的发现操作来探测跨数据触点耦合的电阻器的电阻值。 当发现扩展能力时，可以执行扩展功能，包括加速计费功能和数据通信功能。

公开(公告)号：US20130141861A1

公开(公告)日：2013-06-06

申请号：US13678425

申请日：2012-11-15

Applicant: Apple Inc.

Inventor： Gloria Lin ,  Bryson Gardner ,  Joseph Fisher ,  Dave Goh ,  Barry Corlett ,  Dennis Pyper ,  Amir Salehi

IPC: G06F1/16

CPC classification number: G06F1/16 ,  H05K1/147 ,  H05K1/189 ,  H05K2201/10159 ,  H05K2201/10515

Abstract: This relates to systems and methods for providing a system-on-a-substrate. In some embodiments, the necessary components for an entire system (e.g., a processor, memory, accelerometers, I/O circuitry, or any other suitable components) can be fabricated on a single microchip in “bare die” form. The die can, for example, be coupled to suitable flash memory through a substrate and flexible printed circuit board (“flex”). In some embodiments, the flex can extend past the substrate, die, or both, to allow additional, relatively large components to be coupled to the flex. In some embodiments, the die can be coupled to the flash memory through the flex and without a substrate. In some embodiments, component test points can be placed on the flash memory side of the substrate.

Abstract translation: 这涉及用于提供衬底上系统的系统和方法。 在一些实施例中，整个系统（例如，处理器，存储器，加速度计，I / O电路或任何其它合适的部件）的必要组件可以以“裸模”形式制造在单个微芯片上。 例如，管芯可以通过基板和柔性印刷电路板（“挠曲”）耦合到合适的闪存。 在一些实施例中，柔性件可以延伸经过衬底，管芯或两者，以允许附加的相对较大的部件联接到弯曲部。 在一些实施例中，管芯可以通过弯曲而不与衬底耦合到闪存。 在一些实施例中，组件测试点可以放置在衬底的闪存侧。