公开(公告)号：US20230187370A1

公开(公告)日：2023-06-15

申请号：US18075141

申请日：2022-12-05

Applicant: Applied Materials, Inc.

Inventor： Han-Wen CHEN ,  Steven VERHAVERBEKE ,  Giback PARK ,  Giorgio CELLERE ,  Diego TONINI ,  Vincent DICAPRIO ,  Kyuil CHO

IPC: H01L23/538 ,  H01L21/48 ,  H01L23/13 ,  H01L23/14 ,  H01L23/498 ,  H01L25/10 ,  H01L23/66 ,  H01Q1/22 ,  H01Q1/24 ,  H05K1/02 ,  H01L21/50 ,  H01L21/768 ,  H01L25/065 ,  H01L27/06

CPC classification number: H01L23/5389 ,  H01L21/486 ,  H01L21/4864 ,  H01L23/13 ,  H01L23/147 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/49894 ,  H01L23/5384 ,  H01L23/5386 ,  H01L25/105 ,  H01L23/66 ,  H01Q1/2283 ,  H01Q1/243 ,  H05K1/0243 ,  H01L21/50 ,  H01L21/76802 ,  H01L23/5385 ,  H01L25/0657 ,  H01L27/0688 ,  H01L2225/1035 ,  H01L2225/107 ,  H01L2021/60007

Abstract: The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.

公开(公告)号：US20240021533A1

公开(公告)日：2024-01-18

申请号：US18362433

申请日：2023-07-31

Applicant: Applied Materials, Inc.

Inventor： Han-Wen CHEN ,  Steven VERHAVERBEKE ,  Guan Huei SEE ,  Giback PARK ,  Giorgio CELLERE ,  Diego TONINI ,  Vincent DICAPRIO ,  Kyuil CHO

IPC: H01L23/538 ,  H01L21/48 ,  H01L23/13 ,  H01L23/14 ,  H01L23/498 ,  H01L25/10 ,  H01L23/66 ,  H01Q1/22 ,  H01Q1/24 ,  H05K1/02 ,  H01L21/50 ,  H01L21/768 ,  H01L25/065 ,  H01L27/06

CPC classification number: H01L23/5389 ,  H01L21/486 ,  H01L21/4864 ,  H01L23/13 ,  H01L23/147 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/49894 ,  H01L23/5384 ,  H01L23/5386 ,  H01L25/105 ,  H01L23/66 ,  H01Q1/2283 ,  H01Q1/243 ,  H05K1/0243 ,  H01L21/50 ,  H01L21/76802 ,  H01L23/5385 ,  H01L25/0657 ,  H01L27/0688 ,  H01L2225/1035 ,  H01L2225/107 ,  H01L2021/60007

Abstract: The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.

公开(公告)号：US20210257307A1

公开(公告)日：2021-08-19

申请号：US17227983

申请日：2021-04-12

Applicant: Applied Materials, Inc.

Inventor： Han-Wen CHEN ,  Steven VERHAVERBEKE ,  Guan Huei SEE ,  Giback PARK ,  Giorgio CELLERE ,  Diego TONINI ,  Vincent DICAPRIO ,  Kyuil CHO

IPC: H01L23/538 ,  H01L21/48 ,  H01L23/13 ,  H01L23/14 ,  H01L23/498 ,  H01L25/10 ,  H01L23/66 ,  H01Q1/22 ,  H01Q1/24 ,  H05K1/02 ,  H01L21/50 ,  H01L21/768 ,  H01L25/065 ,  H01L27/06

Abstract: The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.

公开(公告)号：US20210257306A1

公开(公告)日：2021-08-19

申请号：US17227811

申请日：2021-04-12

Applicant: Applied Materials, Inc.

Inventor： Han-Wen CHEN ,  Steven VERHAVERBEKE ,  Giback PARK ,  Giorgio CELLERE ,  Diego TONINI ,  Vincent DICAPRIO ,  Kyuil CHO

IPC: H01L23/538 ,  H01L21/48 ,  H01L23/13 ,  H01L23/14 ,  H01L23/498 ,  H01L25/10 ,  H01L23/66 ,  H01Q1/22 ,  H01Q1/24 ,  H05K1/02 ,  H01L21/50 ,  H01L21/768 ,  H01L25/065 ,  H01L27/06

Abstract: The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.