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    LASER ABLATION SYSTEM FOR PACKAGE FABRICATION
    1.
    发明公开
    LASER ABLATION SYSTEM FOR PACKAGE FABRICATION 审中-公开

    公开(公告)号：US20230282498A1

    公开(公告)日：2023-09-07

    申请号：US18195234

    申请日：2023-05-09

    Applicant: Applied Materials, Inc.

    Inventor： Kurtis LESCHKIES ,  Jeffrey L. FRANKLIN ,  Wei-Sheng LEI ,  Steven VERHAVERBEKE ,  Jean DELMAS ,  Han-Wen CHEN ,  Giback PARK

    IPC: H01L21/67 ,  H01L21/48 ,  B23K26/0622 ,  B23K26/382

    CPC classification number: H01L21/67121 ,  H01L21/486 ,  B23K26/0622 ,  B23K26/382 ,  H01L23/49827

    Abstract: The present disclosure relates to systems and methods for fabricating semiconductor packages, and more particularly, for forming features in semiconductor packages by laser ablation. In one embodiment, the laser systems and methods described herein can be utilized to pattern a substrate to be utilized as a package frame for a semiconductor package having one or more interconnections formed therethrough and/or one or more semiconductor dies disposed therein. The laser systems described herein can produce tunable laser beams for forming features in a substrate or other package structure. Specifically, frequency, pulse width, pulse shape, and pulse energy of laser beams are tunable based on desired sizes of patterned features and on the material in which the patterned features are formed. The adjustability of the laser beams enables rapid and accurate formation of features in semiconductor substrates and packages with controlled depth and topography.

    SUBSTRATE STRUCTURING METHODS
    2.
    发明申请
    SUBSTRATE STRUCTURING METHODS 有权

    公开(公告)号：US20220278248A1

    公开(公告)日：2022-09-01

    申请号：US17747408

    申请日：2022-05-18

    Applicant: Applied Materials, Inc.

    Inventor： Han-Wen CHEN ,  Steven VERHAVERBEKE ,  Giback PARK

    IPC: H01L31/18 ,  H01L21/027 ,  H01L21/304 ,  H01L21/768 ,  H01L21/308 ,  H01L21/306

    Abstract: The present disclosure relates to methods and apparatus for structuring a semiconductor substrate. In one embodiment, a method of substrate structuring includes applying a resist layer to a substrate optionally disposed on a carrier. The resist layer is patterned using ultraviolet radiation or laser ablation. The patterned portions of the resist layer are then transferred onto the substrate by micro-blasting to form desired features in the substrate while unexposed or un-ablated portions of the resist layer shield the rest of the substrate. The substrate is then exposed to an etch process and a de-bonding process to remove the resist layer and release the carrier.

    LASER ABLATION FOR PACKAGE FABRICATION
    3.
    发明申请
    LASER ABLATION FOR PACKAGE FABRICATION 有权

    公开(公告)号：US20210346983A1

    公开(公告)日：2021-11-11

    申请号：US16871302

    申请日：2020-05-11

    Applicant: Applied Materials, Inc.

    Inventor： Kurtis LESCHKIES ,  Wei-Sheng LEI ,  Jeffrey L. FRANKLIN ,  Jean DELMAS ,  Han-Wen CHEN ,  Giback PARK ,  Steven VERHAVERBEKE

    IPC: B23K26/0622 ,  B23K26/382 ,  B23K26/40 ,  H01L21/48 ,  H01L25/00

    Abstract: A method of fabricating a frame to enclose one or more semiconductor dies includes forming one or more features including one or more cavities and one or more through-vias in a substrate by a first laser ablation process, filling the one or more through-vias with a dielectric material, and forming a via-in-via in the dielectric material filled in each of the one or more through-vias by a second laser ablation process. The one or more cavities is configured to enclose one or more semiconductor dies therein. In the first laser ablation process, frequency, pulse width, and pulse energy of a first pulsed laser beam to irradiate the substrate are tuned based on a depth of the one or more features. In the second laser ablation process, frequency, pulse width, and pulse energy of a second pulsed laser beam to irradiate the dielectric material are tuned based on a depth of the via-in-via.

    STIFFENER FRAME FOR SEMICONDUCTOR DEVICE PACKAGES
    6.
    发明申请
    STIFFENER FRAME FOR SEMICONDUCTOR DEVICE PACKAGES 有权

    公开(公告)号：US20230070053A1

    公开(公告)日：2023-03-09

    申请号：US17886102

    申请日：2022-08-11

    Applicant: Applied Materials, Inc.

    Inventor： Han-Wen CHEN ,  Steven VERHAVERBEKE ,  Giback PARK

    IPC: H01L23/00 ,  H01L23/498 ,  H01L23/31

    Abstract: The present disclosure relates to semiconductor devices and methods of forming the same. More particularly, the present disclosure relates to semiconductor package devices having a stiffener framed formed thereon. The incorporation of the stiffener frame improves the structural integrity of the semiconductor package devices to mitigate warpage and/or collapse while simultaneously enabling utilization of thinner core substrates for improved signal integrity and power delivery between packaged devices.

    PACKAGE STRUCTURES WITH BUILT-IN EMI SHIELDING
    7.
    发明申请
    PACKAGE STRUCTURES WITH BUILT-IN EMI SHIELDING 有权

    公开(公告)号：US20220157740A1

    公开(公告)日：2022-05-19

    申请号：US17098597

    申请日：2020-11-16

    Applicant: Applied Materials, Inc.

    Inventor： Steven VERHAVERBEKE ,  Han-Wen CHEN ,  Giback PARK ,  Chintan BUCH

    IPC: H01L23/552 ,  H01L23/538 ,  H01L25/065 ,  H01L23/532

    Abstract: The present disclosure relates to thin-form-factor semiconductor packages with integrated electromagnetic interference (“EMI”) shields and methods for forming the same. The packages described herein may be utilized to form high-density semiconductor devices. In certain embodiments, a silicon substrate is laser ablated to include one or more cavities and a plurality of vias surrounding the cavities. One or more semiconductor dies may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. A plurality of conductive interconnections are formed within the vias and may have contact points redistributed to desired surfaces of the die-embedded substrate assembly. Thereafter, an EMI shield is plated onto a surface of the die-embedded substrate assembly and connected to ground by at least one of the one or more conductive interconnections. The die-embedded substrate assembly may then be singulated and/or integrated with another semiconductor device.

    SUBSTRATE STRUCTURING METHODS
    9.
    发明申请
    SUBSTRATE STRUCTURING METHODS 有权

    公开(公告)号：US20210234060A1

    公开(公告)日：2021-07-29

    申请号：US17227763

    申请日：2021-04-12

    Applicant: Applied Materials, Inc.

    Inventor： Han-Wen CHEN ,  Steven VERHAVERBEKE ,  Giback PARK

    IPC: H01L31/18

    Abstract: The present disclosure relates to methods and apparatus for structuring a semiconductor substrate. In one embodiment, a method of substrate structuring includes applying a resist layer to a substrate optionally disposed on a carrier. The resist layer is patterned using ultraviolet radiation or laser ablation. The patterned portions of the resist layer are then transferred onto the substrate by micro-blasting to form desired features in the substrate while unexposed or un-ablated portions of the resist layer shield the rest of the substrate. The substrate is then exposed to an etch process and a de-bonding process to remove the resist layer and release the carrier.

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