公开(公告)号：US20240332031A1

公开(公告)日：2024-10-03

申请号：US18193455

申请日：2023-03-30

Applicant: Applied Materials, Inc.

Inventor： Feng QIAO ,  Hailong ZHOU ,  Qian FU ,  Sangjun PARK ,  Jayoung CHOI ,  Radhe AGARWAL ,  Tong LIU

IPC: H01L21/3213 ,  H01L21/3065

CPC classification number: H01L21/32137 ,  H01L21/3065 ,  H01L21/32139

Abstract: A method and system for etching high aspect ratio structures in a semiconducting processing chamber are disclosed herein. In one example, a method of patterning a substrate comprises etching the substrate to form a recess, depositing a passivation layer on sidewalls of the recess, treating the passivation layer, and etching the recess to a second depth. The substrate etch forms a recess to a first depth, the substrate having a mask layer disposed thereon. The treating of the passivation layer is for removal of a clogging material formed from an etch byproduct on the mask layer. The etching the recess to a second depth while maintaining a minimum variation of a recess sidewall width.

公开(公告)号：US20190043723A1

公开(公告)日：2019-02-07

申请号：US16035994

申请日：2018-07-16

Applicant: Applied Materials, Inc.

Inventor： Hailong ZHOU ,  Yangchung LEE ,  Chain LEE ,  Hui SUN ,  Jonathan Sungehul KIM

IPC: H01L21/033 ,  H01L21/3213 ,  H01L21/311

Abstract: Implementations described herein generally relate to an etching process for etching materials with high selectivity. In one implementation, a method of etching a gate material to form features in the gate material is provided. The method includes (a) exposing a cobalt mask layer to a fluorine-containing gas mixture in a first mode to form a passivation film on the cobalt mask layer. The cobalt mask layer exposes a portion of a gate material disposed on a substrate. The method further comprises (b) exposing the portion of the gate material to an etching gas mixture in a second mode to etch the portion of the gate material. The portion of the gate material is etched through openings defined in the cobalt mask layer and the portion of the gate material is etched at a greater rate than the cobalt mask layer having the passivation layer disposed thereon.

公开(公告)号：US20180025914A1

公开(公告)日：2018-01-25

申请号：US15216948

申请日：2016-07-22

Applicant: Applied Materials, Inc.

Inventor： Hailong ZHOU ,  Gene LEE ,  Abhijit PATIL ,  Shan JIANG ,  Akhil MEHROTRA ,  Jonathan KIM

IPC: H01L21/311 ,  H01L21/02

CPC classification number: H01L21/31116 ,  H01L21/02167 ,  H01L21/02274 ,  H01L21/0276 ,  H01L21/31144

Abstract: Methods for etching a bottom anti-reflective coating (BARC) and/or an anti-reflective coating (ARC) and/or a dielectric anti-reflective coating (DARC) to form high aspect ratio features using an etch process are provided. The methods described herein advantageously facilitate profile and dimension control of features with high aspect ratios through a proper sidewall and bottom management scheme during the bottom anti-reflective coating (BARC) and/or an anti-reflective coating (ARC) and/or a dielectric anti-reflective coating (DARC) open process. In one embodiment, a method for etching a dielectric anti-reflective coating (DARC) layer to form features in the DARC layer includes supplying an etching gas mixture onto a DARC layer disposed on a substrate, wherein the substrate is disposed on a substrate support pedestal assembly disposed in a processing chamber, controlling a temperature of the substrate support pedestal assembly greater than 110 degrees Celsius, and etching the DARC layer disposed on the substrate.

公开(公告)号：US20220336222A1

公开(公告)日：2022-10-20

申请号：US17244873

申请日：2021-04-29

Applicant: Applied Materials, Inc.

Inventor： Hailong ZHOU ,  Sean KANG ,  Kenji TAKESHITA ,  Rajinder DHINDSA ,  Taehwan LEE ,  Iljo KWAK

IPC: H01L21/311

Abstract: Embodiments of this disclosure include a method of processing a substrate that includes etching a first dielectric material formed on a substrate that is disposed on a substrate supporting surface of a substrate support assembly disposed within a processing region of a plasma processing chamber. The etching process may include delivering a process gas to the processing region, wherein the process gas comprises a first fluorocarbon containing gas and a first process gas, delivering, by use of a radio frequency generator, a radio frequency signal to a first electrode to form a plasma in the processing region, and establishing, by use of a first pulsed-voltage waveform generator, a first pulsed voltage waveform at a biasing electrode disposed within the substrate support assembly. The first pulsed voltage waveform comprises a series of repeating pulsed waveform cycles that each include a first portion that occurs during a first time interval, a second portion that occurs during a second time interval, and a peak-to-peak voltage. The pulsed voltage waveform is substantially constant during at least a portion of the second time interval.

公开(公告)号：US20180337047A1

公开(公告)日：2018-11-22

申请号：US15984285

申请日：2018-05-18

Applicant: Applied Materials, Inc.

Inventor： Nancy FUNG ,  Gene LEE ,  Hailong ZHOU ,  Zohreh HESABI ,  Akhil MEHROTRA ,  Shan JIANG ,  Abhijit PATIL ,  Chi-I LANG ,  Larry GAO

IPC: H01L21/033

CPC classification number: H01L21/0338 ,  H01L21/0332 ,  H01L21/0335 ,  H01L21/0337

Abstract: A method of etching a hardmask layer formed on a substrate is provided. The method includes supplying an etching gas mixture to a processing region of a processing chamber. A device substrate is disposed in the processing region when the etching gas mixture is supplied to the processing region. The device substrate comprises a substrate and a hardmask layer formed over the substrate. The etching gas mixture comprises a fluorine-containing gas, a silicon-containing gas, and an oxygen-containing gas. The method further includes providing RF power to the etching gas mixture to form a plasma in the processing region. The plasma is configured to etch exposed portions of the hardmask layer.