公开(公告)号：US11459652B2

公开(公告)日：2022-10-04

申请号：US17072143

申请日：2020-10-16

Applicant: Applied Materials, Inc.

Inventor： M. Arif Zeeshan ,  Tristan Y. Ma ,  Kelvin Chan

IPC: H01L21/02 ,  C23C16/02 ,  H01L21/285 ,  C23C16/505 ,  H01J37/32 ,  H01L21/288 ,  H01L27/108

Abstract: Embodiments herein include void-free material depositions on a substrate (e.g., in a void-free trench-filled (VFTF) component). In some embodiments, a method may include providing a plurality of device structures extending from a base, each of the plurality of device structures including a first sidewall opposite a second sidewall and a top surface extending between the first and second sidewalls, and providing a seed layer over the plurality of device structures. The method may further include forming a dielectric layer along just the top surface and along an upper portion of the first and second sidewalls using an angled deposition delivered to the plurality of device structures at a non-zero angle of inclination relative to a perpendicular extending from an upper surface of the base, and forming a fill material within one or more trenches defined by the plurality of device structures.

公开(公告)号：US12191156B2

公开(公告)日：2025-01-07

申请号：US16840424

申请日：2020-04-05

Applicant: APPLIED Materials, Inc.

Inventor： John Hautala ,  Tristan Y. Ma ,  Peter F. Kurunczi

IPC: C23C16/50 ,  C23C14/22 ,  C23C16/455 ,  C23C16/458 ,  H01J37/305 ,  H01J37/32 ,  H01L21/308 ,  H01L21/311 ,  C23C14/34 ,  C23C14/46

Abstract: A ribbon beam plasma enhanced chemical vapor deposition (PECVD) system comprising a process chamber containing a platen for supporting a substrate, and a plasma source disposed adjacent the process chamber and adapted to produce free radicals in a plasma chamber, the plasma chamber having an aperture associated therewith for allowing a beam of the free radicals to exit the plasma chamber, wherein the process chamber is maintained at a first pressure and the plasma chamber is maintained at a second pressure greater than the first pressure for driving the free radicals from the plasma chamber into the process chamber.

公开(公告)号：US20220404115A1

公开(公告)日：2022-12-22

申请号：US17893559

申请日：2022-08-23

Applicant: Applied Materials, Inc.

Inventor： M. Arif Zeeshan ,  Tristan Y. Ma ,  Kelvin Chan

IPC: F41B3/02

Abstract: Embodiments herein include void-free material depositions on a substrate (e.g., in a void-free trench-filled (VFTF) component). In some embodiments, a method may include providing a plurality of device structures extending from a base, each of the plurality of device structures including a first sidewall opposite a second sidewall and a top surface extending between the first and second sidewalls, and providing a seed layer over the plurality of device structures. The method may further include forming a dielectric layer along just the top surface and along an upper portion of the first and second sidewalls using an angled deposition delivered to the plurality of device structures at a non-zero angle of inclination relative to a perpendicular extending from an upper surface of the base, and forming a fill material within one or more trenches defined by the plurality of device structures.

公开(公告)号：US20220399225A1

公开(公告)日：2022-12-15

申请号：US17348093

申请日：2021-06-15

Applicant: Applied Materials, Inc.

Inventor： Armin Saeedi Vahdat ,  Tristan Y. Ma ,  Johannes M. van Meer ,  John Hautala ,  Naushad K. Variam

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/764

Abstract: Disclosed are approaches for forming semiconductor device cavities using directional dielectric deposition. One method may include providing a plurality of semiconductor structures and a plurality of trenches of a semiconductor device, and forming a dielectric atop the plurality of semiconductor structures by delivering a dielectric material at a non-zero angle of inclination relative to a normal extending perpendicular from a top surface of the plurality of semiconductor structures. The dielectric may be further formed by delivering the dielectric material at a second non-zero angle of inclination relative to the normal extending perpendicular from the top surface of the plurality of semiconductor structures.

公开(公告)号：US11942361B2

公开(公告)日：2024-03-26

申请号：US17348093

申请日：2021-06-15

Applicant: Applied Materials, Inc.

Inventor： Armin Saeedi Vahdat ,  Tristan Y. Ma ,  Johannes M. van Meer ,  John Hautala ,  Naushad K. Variam

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/764

CPC classification number: H01L21/7682 ,  H01L21/0226 ,  H01L21/764

Abstract: Disclosed are approaches for forming semiconductor device cavities using directional dielectric deposition. One method may include providing a plurality of semiconductor structures and a plurality of trenches of a semiconductor device, and forming a dielectric atop the plurality of semiconductor structures by delivering a dielectric material at a non-zero angle of inclination relative to a normal extending perpendicular from a top surface of the plurality of semiconductor structures. The dielectric may be further formed by delivering the dielectric material at a second non-zero angle of inclination relative to the normal extending perpendicular from the top surface of the plurality of semiconductor structures.

公开(公告)号：US11778832B2

公开(公告)日：2023-10-03

申请号：US17306047

申请日：2021-05-03

Applicant: Applied Materials, Inc.

Inventor： Armin Saeedi Vahdat ,  Tristan Y. Ma ,  Johannes M. van Meer ,  John Hautala ,  Naushad K. Variam

IPC: H10B43/35 ,  H10B41/20 ,  H10B41/35 ,  H10B43/20 ,  G11C8/14

CPC classification number: H10B43/35 ,  G11C8/14 ,  H10B41/20 ,  H10B41/35 ,  H10B43/20

Abstract: Disclosed are approaches for 3D NAND structure fabrication. One method may include providing a stack of layers comprising a first and second plurality of layers, and forming a plurality of trenches in the stack of layers, wherein each of the trenches includes a tiered sidewall. A first trench may be formed to a first depth, and a second trench may be formed to a second depth, which is greater than the first depth. The method may further include forming a liner within the trenches, wherein the liner is deposited at a non-zero angle of inclination relative to a normal extending perpendicular from the top surface of the stack of layers. The liner may have a first thickness along the tiered sidewall of the first trench and a second thickness along the tiered sidewall of the second trench, wherein the first thickness is greater than the second thickness.

公开(公告)号：US20220352182A1

公开(公告)日：2022-11-03

申请号：US17306047

申请日：2021-05-03

Applicant: Applied Materials, Inc.

Inventor： Armin Saeedi Vahdat ,  Tristan Y. Ma ,  Johannes M. van Meer ,  John Hautala ,  Naushad K. Variam

IPC: H01L27/1157 ,  H01L27/11524 ,  H01L27/11551 ,  H01L27/11578 ,  G11C8/14

Abstract: Disclosed are approaches for 3D NAND structure fabrication. One method may include providing a stack of layers comprising a first and second plurality of layers, and forming a plurality of trenches in the stack of layers, wherein each of the trenches includes a tiered sidewall. A first trench may be formed to a first depth, and a second trench may be formed to a second depth, which is greater than the first depth. The method may further include forming a liner within the trenches, wherein the liner is deposited at a non-zero angle of inclination relative to a normal extending perpendicular from the top surface of the stack of layers. The liner may have a first thickness along the tiered sidewall of the first trench and a second thickness along the tiered sidewall of the second trench, wherein the first thickness is greater than the second thickness.

公开(公告)号：US20220119938A1

公开(公告)日：2022-04-21

申请号：US17072143

申请日：2020-10-16

Applicant: Applied Materials, Inc.

Inventor： M. Arif Zeeshan ,  Tristan Y. Ma ,  Kelvin Chan

IPC: C23C16/02 ,  C23C16/505 ,  H01L21/285 ,  H01L21/02 ,  H01J37/32 ,  H01L21/288 ,  H01L27/108

Abstract: Embodiments herein include void-free material depositions on a substrate (e.g., in a void-free trench-filled (VFTF) component). In some embodiments, a method may include providing a plurality of device structures extending from a base, each of the plurality of device structures including a first sidewall opposite a second sidewall and a top surface extending between the first and second sidewalls, and providing a seed layer over the plurality of device structures. The method may further include forming a dielectric layer along just the top surface and along an upper portion of the first and second sidewalls using an angled deposition delivered to the plurality of device structures at a non-zero angle of inclination relative to a perpendicular extending from an upper surface of the base, and forming a fill material within one or more trenches defined by the plurality of device structures.