公开(公告)号：US08895450B2

公开(公告)日：2014-11-25

申请号：US14054477

申请日：2013-10-15

Applicant: Applied Materials, Inc.

Inventor： Yong Cao ,  Xianmin Tang ,  Srinivas Gandikota ,  Wei D. Wang ,  Zhendong Liu ,  Kevin Moraes ,  Muhammad M. Rasheed ,  Thanh X. Nguyen ,  Ananthkrishna Jupudi

IPC: H01L21/302 ,  H01L21/461 ,  H01L21/28 ,  C23C14/35 ,  H01L21/285 ,  C23C14/34 ,  H01L29/49 ,  C23C14/16 ,  H01L29/78 ,  H01L29/51

CPC classification number: H01L21/28079 ,  C23C14/165 ,  C23C14/345 ,  C23C14/35 ,  H01L21/28088 ,  H01L21/2855 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/78

Abstract: Embodiments described herein provide a semiconductor device and methods and apparatuses of forming the same. The semiconductor device includes a substrate having a source and drain region and a gate electrode stack on the substrate between the source and drain regions. In one embodiment, the method includes positioning a substrate within a processing chamber, wherein the substrate includes a source and drain region, a gate dielectric layer between the source and drain regions, and a conductive film layer on the gate dielectric layer. The method also includes depositing a refractory metal nitride film layer on the conductive film layer, depositing a silicon-containing film layer on the refractory metal nitride film layer, and depositing a tungsten film layer on the silicon-containing film layer.

Abstract translation: 本文所述的实施例提供了一种半导体器件及其形成方法和装置。 半导体器件包括在源极和漏极区域之间的衬底上具有源极和漏极区域以及栅电极堆叠的衬底。 在一个实施例中，该方法包括将衬底定位在处理室内，其中衬底包括源极和漏极区域，源极和漏极区域之间的栅极介电层以及栅极电介质层上的导电膜层。 该方法还包括在导电膜层上沉积难熔金属氮化物膜层，在难熔金属氮化物膜层上沉积含硅膜层，并在含硅膜层上沉积钨膜层。

公开(公告)号：US09666416B2

公开(公告)日：2017-05-30

申请号：US14954622

申请日：2015-11-30

Applicant: Applied Materials, Inc.

Inventor： John C. Forster ,  Anantha Subramani ,  Wei D. Wang

IPC: C23C14/24 ,  H01J37/32 ,  H01L21/02 ,  H01L21/67 ,  C23C14/34

CPC classification number: H01J37/32477 ,  C23C14/34 ,  H01J37/32495 ,  H01L21/02043 ,  H01L21/67005

Abstract: A method and apparatus are described for reducing particle contamination in a plasma processing chamber. In one embodiment, a pasting disk is provided which includes a disk-shaped base of high-resistivity material that has an electrically conductive pasting material layer applied to a top surface of the base so that the pasting material layer partially covers the top surface of the base. The pasting disk is sputter etched to deposit conductive pasting material over a wide area on the interior surfaces of a plasma processing chamber while minimizing deposition on dielectric components that are used to optimize the sputter etch process during substrate processing.