公开(公告)号：US08698232B2

公开(公告)日：2014-04-15

申请号：US12655668

申请日：2010-01-04

申请人： Aram Arzumanyan ,  Timothy D. Henson ,  Ling Ma

发明人： Aram Arzumanyan ,  Timothy D. Henson ,  Ling Ma

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/7811 ,  H01L29/407 ,  H01L29/66734 ,  H01L29/7813

摘要： According to one embodiment, a semiconductor device including a voltage controlled termination structure comprises an active area including a base region of a first conductivity type formed in a semiconductor body of a second conductivity type formed over a first major surface of a substrate of the second conductivity type, a termination region formed in the semiconductor body adjacent the active area and including the voltage controlled termination structure. The voltage controlled termination structure includes an electrode electrically connected to a terminal of the semiconductor device. In one embodiment, the electrode of the voltage controlled termination structure is electrically connected to a gate terminal of the semiconductor device. In one embodiment, the electrode of the voltage controlled termination structure is electrically connected to a source terminal of the semiconductor device.

摘要翻译： 根据一个实施例，包括电压控制终端结构的半导体器件包括有源区，该有源区包括形成在第二导电类型的半导体本体中的第一导电类型的基极区，形成在第二导电性的衬底的第一主表面上 类型，形成在与有源区相邻的半导体本体中并且包括电压控制的端接结构的端接区。 电压控制终端结构包括电连接到半导体器件的端子的电极。 在一个实施例中，电压控制终端结构的电极电连接到半导体器件的栅极端子。 在一个实施例中，电压控制终端结构的电极电连接到半导体器件的源极端子。

公开(公告)号：US20110163373A1

公开(公告)日：2011-07-07

申请号：US12655668

申请日：2010-01-04

申请人： Aram Arzumanyan ,  Timothy D. Henson ,  Ling Ma

发明人： Aram Arzumanyan ,  Timothy D. Henson ,  Ling Ma

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/7811 ,  H01L29/407 ,  H01L29/66734 ,  H01L29/7813

摘要： According to one embodiment, a semiconductor device including a voltage controlled termination structure comprises an active area including a base region of a first conductivity type formed in a semiconductor body of a second conductivity type formed over a first major surface of a substrate of the second conductivity type, a termination region formed in the semiconductor body adjacent the active area and including the voltage controlled termination structure. The voltage controlled termination structure includes an electrode electrically connected to a terminal of the semiconductor device. In one embodiment, the electrode of the voltage controlled termination structure is electrically connected to a gate terminal of the semiconductor device. In one embodiment, the electrode of the voltage controlled termination structure is electrically connected to a source terminal of the semiconductor device.

摘要翻译： 根据一个实施例，包括电压控制终端结构的半导体器件包括有源区，该有源区包括形成在第二导电类型的半导体本体中的第一导电类型的基极区，形成在第二导电性的衬底的第一主表面上 类型，形成在与有源区相邻的半导体本体中并且包括电压控制的端接结构的端接区。 电压控制终端结构包括电连接到半导体器件的端子的电极。 在一个实施例中，电压控制终端结构的电极电连接到半导体器件的栅极端子。 在一个实施例中，电压控制终端结构的电极电连接到半导体器件的源极端子。

公开(公告)号：US07508052B2

公开(公告)日：2009-03-24

申请号：US11141859

申请日：2005-06-01

申请人： Hugo R. G. Burke ,  Aram Arzumanyan

发明人： Hugo R. G. Burke ,  Aram Arzumanyan

IPC分类号： H01L23/544

CPC分类号： H01L23/585 ,  H01L21/78 ,  H01L23/296 ,  H01L23/544 ,  H01L23/562 ,  H01L24/11 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/13099 ,  H01L2924/01033 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2924/00014

摘要： A wafer containing a plurality of die separated by streets which are to be sawn has a nitride passivation layer which has openings over die contact locations and gaps leaving nitride strips along the streets. The gaps in the nitride along the streets expose an oxide, preferably TEOS. A nickel/gold plate contact material overlies the nitride layer and contacts the exposed die contact areas but does not adhere to either the nitride surface or the oxide surfaces. A saw blade can then cut along the streets without being gummed by the metalizing and without producing cracks which propagate into the die termination areas.

摘要翻译： 包含要被锯割的街道分开的多个模具的晶片具有氮化物钝化层，其在模具接触位置和开口处沿着街道留下氮化物带。 沿着街道的氮化物中的间隙暴露氧化物，优选TEOS。 镍/金板接触材料覆盖在氮化物层上并与暴露的裸片接触区域接触，但不粘附到氮化物表面或氧化物表面上。 然后，锯片可以沿着街道切割而不被金属化而胶合，并且不产生传播到模具终止区域中的裂纹。

公开(公告)号：US06653740B2

公开(公告)日：2003-11-25

申请号：US09780080

申请日：2001-02-09

申请人： Daniel M. Kinzer ,  Aram Arzumanyan ,  Tim Sammon

发明人： Daniel M. Kinzer ,  Aram Arzumanyan ,  Tim Sammon

IPC分类号： H01L2701

CPC分类号： H01L29/7813 ,  H01L23/3114 ,  H01L23/367 ,  H01L23/50 ,  H01L29/41741 ,  H01L29/4238 ,  H01L29/7809 ,  H01L2224/16 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2924/00014

摘要： A flip-chip MOSFET structure has a vertical conduction semiconductor die in which the lower layer of the die is connected to a drain electrode on the top of the die by a diffusion sinker or conductive electrode. The source and gate electrodes are also formed on the upper surface of the die and have coplanar solder balls for connection to a circuit board. The structure has a chip scale package size. The back surface of the die, which is inverted when the die is mounted may be roughened or may be metallized to improve removal of heat from the die. Several separate MOSFETs can be integrated side-by-side into the die to form a series connection of MOSFETs with respective source and gate electrodes at the top surface having solder ball connectors. Plural solder ball connectors may be provided for the top electrodes and are laid out in respective parallel rows. The die may have the shape of an elongated rectangle with the solder balls laid out symmetrically to a diagonal to the rectangle.

摘要翻译： 倒装芯片MOSFET结构具有垂直导电半导体管芯，其中管芯的下层通过扩散沉积片或导电电极连接到管芯顶部的漏电极。 源极和栅电极也形成在管芯的上表面上，并且具有用于连接到电路板的共面焊球。 该结构具有芯片级封装尺寸。 当安装模具时倒模的模具的背面可以被粗糙化或者可以被金属化以改善从模具中的热量的去除。 几个单独的MOSFET可以并排集成到管芯中，以形成MOSFET与具有焊球连接器的顶表面处的相应源极和栅电极的串联连接。 可以为顶部电极提供多个焊球连接器并且布置在各自的平行行中。 模具可以具有细长矩形的形状，其中焊球对称地对准矩形的对角线。