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    Software power control of circuit modules in a shared and distributed DMA system
    1.
    发明授权
    Software power control of circuit modules in a shared and distributed DMA system 有权
    在共享和分布式DMA系统中的电路模块的软件功率控制

    公开(公告)号：US07321980B2

    公开(公告)日：2008-01-22

    申请号：US11035216

    申请日：2005-01-13

    Applicant: Subrangshu Kumar Das ,  Ashutosh Tiwari ,  Subash Chandar Govindarajan ,  Karthikeyan Rajan Madathil

    Inventor： Subrangshu Kumar Das ,  Ashutosh Tiwari ,  Subash Chandar Govindarajan ,  Karthikeyan Rajan Madathil

    IPC: G06F1/04 ,  G06F1/12 ,  G06F5/06

    CPC classification number: G11C7/1063 ,  G11C7/16 ,  G11C7/20 ,  G11C2207/104 ,  G11C2207/16

    Abstract: A system-on-chip integrated circuit selectively gates clocks to individual modules corresponding to the state of a corresponding bit of a peripheral enable register. A reset circuit supplies a signal to a reset input of the digital module for a normal mode if the bit indicates the power-up state and a reset mode if the bit indicates a power-down state. Return to normal mode is delayed a predetermined time after the said bit of indicates the power-up state to ensure clean power up. A false acknowledge circuit for each module supplies an acknowledge signal in response to a received command if the corresponding bit indicates the power-down state.

    Abstract translation: 片上系统集成电路有选择地将时钟门控地对应于外围使能寄存器的相应位的状态。 如果位指示上电状态，则复位电路将信号提供给数字模块的复位输入，如果该位指示掉电状态，则将该信号提供给正常模式的复位输入。 在所述位指示上电状态之后，恢复正常模式被延迟预定时间，以确保清洁上电。 如果相应的位指示掉电状态，则每个模块的错误确认电路响应于接收到的命令提供确认信号。

    Method to hide or reduce access latency of a slow peripheral in a pipelined direct memory access system
    2.
    发明授权
    Method to hide or reduce access latency of a slow peripheral in a pipelined direct memory access system 有权
    在流水线直接存储器访问系统中隐藏或减少慢外设的访问延迟的方法

    公开(公告)号：US07673091B2

    公开(公告)日：2010-03-02

    申请号：US12107274

    申请日：2008-04-22

    Applicant: Ashutosh Tiwari ,  Subrangshu Kumar Das

    Inventor： Ashutosh Tiwari ,  Subrangshu Kumar Das

    IPC: G06F13/00

    CPC classification number: G06F13/4059

    Abstract: A bus bridge between a high speed DMA bus and a lower speed peripheral bus sets a threshold for minimum available buffer space to send a read request dependent upon a frequency ratio and the DMA read latency. Similarly, a threshold for minimum available data for a write request depends on the frequency ratio and the DMA write latency. The bus bridge can store programmable values for the DMA read latency and write latency.

    Abstract translation: 高速DMA总线和低速外设总线之间的总线桥接器设置最小可用缓冲区空间的阈值，以根据频率比和DMA读取延迟发送读取请求。 类似地，用于写请求的最小可用数据的阈值取决于频率比和DMA写延迟。 总线桥可以存储DMA读延迟和写延迟的可编程值。

    Software controlled hard reset of mastering IPS
    3.
    发明授权
    Software controlled hard reset of mastering IPS 有权
    掌握IPS的软件控制硬复位

    公开(公告)号：US07315905B2

    公开(公告)日：2008-01-01

    申请号：US11034579

    申请日：2005-01-13

    Applicant: Subrangshu Kumar Das ,  Ashutosh Tiwari ,  Subash Chandar Govindarajan

    Inventor： Subrangshu Kumar Das ,  Ashutosh Tiwari ,  Subash Chandar Govindarajan

    IPC: G06F13/10 ,  G06F1/24

    CPC classification number: G06F13/28 ,  G06F2213/0038

    Abstract: A system-on-chip integrated circuit includes a peripheral initialization register has a bit corresponding to each module. Each bit indicates a normal mode or a reset mode for the corresponding module. A direct memory access unit can receive, prioritize and queue date movement transactions between modules and can read from or write to the peripheral initialization register. A peripheral interface unit prevents a write to the peripheral initialization register changing a module from reset mode to normal mode while there is an uncompleted data movement transaction involving that module. A false acknowledge circuit for each module supplies an acknowledge signal in response to a received command if the module is in reset mode.

    Abstract translation: 片上系统集成电路包括外设初始化寄存器，其中每个模块都有一个位。 每个位表示相应模块的正常模式或复位模式。 直接存储器访问单元可以接收，优先排列和排队模块之间的日期移动事务，并且可以从外设初始化寄存器读取或向其写入。 外围接口单元防止写入外围初始化寄存器，将模块从复位模式更改为正常模式，同时存在涉及该模块的未完成数据移动事务。 如果模块处于复位模式，每个模块的错误确认电路将响应于接收到的命令提供一个确认信号。

    Method to Hide or Reduce Access Latency of a Slow Peripheral in a Pipelined Direct Memory Access System
    4.
    发明申请
    Method to Hide or Reduce Access Latency of a Slow Peripheral in a Pipelined Direct Memory Access System 有权
    在流水线直接存储器访问系统中隐藏或减少慢外设访问延迟的方法

    公开(公告)号：US20080270668A1

    公开(公告)日：2008-10-30

    申请号：US12107274

    申请日：2008-04-22

    Applicant: Ashutosh Tiwari ,  Subrangshu Kumar Das

    Inventor： Ashutosh Tiwari ,  Subrangshu Kumar Das

    IPC: G06F13/28

    CPC classification number: G06F13/4059

    Abstract: A bus bridge between a high speed DMA bus and a lower speed peripheral bus sets a threshold for minimum available buffer space to send a read request dependent upon a frequency ratio and the DMA read latency. Similarly, a threshold for minimum available data for a write request depends on the frequency ratio and the DMA write latency. The bus bridge can store programmable values for the DMA read latency and write latency.

    Abstract translation: 高速DMA总线和低速外设总线之间的总线桥接器设置最小可用缓冲区空间的阈值，以根据频率比和DMA读取延迟发送读取请求。 类似地，用于写请求的最小可用数据的阈值取决于频率比和DMA写延迟。 总线桥可以存储DMA读延迟和写延迟的可编程值。

    Adapting Legacy/Third Party IPs to Advanced Power Management Protocol
    5.
    发明申请
    Adapting Legacy/Third Party IPs to Advanced Power Management Protocol 有权
    将旧版/第三方IP适应高级电源管理协议

    公开(公告)号：US20120198112A1

    公开(公告)日：2012-08-02

    申请号：US13285100

    申请日：2011-10-31

    Applicant: Ashutosh Tiwari

    Inventor： Ashutosh Tiwari

    IPC: G06F13/24

    CPC classification number: G06F1/3237 ,  Y02D10/128 ,  Y02D50/20

    Abstract: An apparatus adapts a pre-designed circuit module not supporting a power management protocol to a power management protocol. The apparatus disconnects a bus interface, disables interrupt and stops a clock to the pre-designed circuit module on a external idle request signal.

    Abstract translation: 一种装置将不支持电源管理协议的预先设计的电路模块与电源管理协议相匹配。 该设备断开总线接口，禁止中断，并在外部空闲请求信号上停止对预先设计的电路模块的时钟。

    SYSTEM FOR SERVING ADVERTISEMENTS TARGETED TO GEOGRAPHIC AREAS OVER MOBILE DEVICES
    6.
    发明申请
    SYSTEM FOR SERVING ADVERTISEMENTS TARGETED TO GEOGRAPHIC AREAS OVER MOBILE DEVICES 审中-公开
    用于服务移动设备上针对地理区域的广告系统

    公开(公告)号：US20100312646A1

    公开(公告)日：2010-12-09

    申请号：US11963029

    申请日：2007-12-21

    Applicant: Arvind Gupta ,  Ashutosh Tiwari ,  Gopalakrishnan Venkatraman ,  Dominic Cheung ,  Stacy R. Bennett ,  Douglas B. Koen

    Inventor： Arvind Gupta ,  Ashutosh Tiwari ,  Gopalakrishnan Venkatraman ,  Dominic Cheung ,  Stacy R. Bennett ,  Douglas B. Koen

    IPC: G06Q30/00

    CPC classification number: G06Q30/02 ,  G06Q30/0261

    Abstract: A system is described for serving advertisements targeted to geographic areas over mobile devices. The system may include a processor, a memory and an interface being operatively connected. The memory may store a request associated with a mobile device, and an advertisement. The processor may be operative to communicate with the mobile device. The mobile device may be associated with a mobile carrier. The processor may receive the request associated with the mobile device and may determine a geographic location associated with the request. The processor may identify an advertisement, the advertisement being targeted to the geographic area and the mobile carrier. The processor may provide the identified advertisement to the mobile device.

    Abstract translation: 描述了用于为通过移动设备定位到地理区域的广告服务的系统。 该系统可以包括处理器，存储器和可操作地连接的接口。 存储器可以存储与移动设备相关联的请求和广告。 处理器可操作以与移动设备进行通信。 移动设备可以与移动运营商相关联。 处理器可以接收与移动设备相关联的请求，并且可以确定与该请求相关联的地理位置。 处理器可以识别广告，广告被定位到地理区域和移动运营商。 处理器可以向移动设备提供所识别的广告。

    SYSTEM FOR PROVIDING MOBILE ADVERTISEMENT ACTIONS
    7.
    发明申请
    SYSTEM FOR PROVIDING MOBILE ADVERTISEMENT ACTIONS 有权
    提供移动广告行动的系统

    公开(公告)号：US20090247140A1

    公开(公告)日：2009-10-01

    申请号：US12059460

    申请日：2008-03-31

    Applicant: Arvind Gupta ,  Ashutosh Tiwari ,  Gopalakrishnan Venkatraman ,  Dominic Cheung ,  Stacy R. Bennett ,  Douglas B. Koen

    Inventor： Arvind Gupta ,  Ashutosh Tiwari ,  Gopalakrishnan Venkatraman ,  Dominic Cheung ,  Stacy R. Bennett ,  Douglas B. Koen

    IPC: H04M3/00 ,  H04Q7/20

    CPC classification number: G06Q30/0257 ,  G06Q30/02 ,  G06Q30/0256 ,  H04M1/72561

    Abstract: A system for providing mobile advertisement actions may include a memory to store a request, mobile carrier data, mobile advertisement data, and mobile advertisement action data. The system may include an interface operatively connected to the memory to communicate with a mobile device. The system may include a processor operatively connected to the memory and the interface. The processor may receive information and a request from the mobile device via the interface and may determine the mobile carrier data relating to a mobile carrier associated with the mobile device. The processor may identify the mobile advertisement data and the mobile advertisement action targeted to the request and the mobile carrier data. The processor may append the mobile advertisement action data to the mobile advertisement data. The processor may provide the mobile advertisement data with the appended mobile advertisement action data to the mobile device via the interface.

    Abstract translation: 用于提供移动广告动作的系统可以包括存储请求，移动运营商数据，移动广告数据和移动广告动作数据的存储器。 系统可以包括可操作地连接到存储器以与移动设备通信的接口。 该系统可以包括可操作地连接到存储器和接口的处理器。 处理器可以经由接口从移动设备接收信息和请求，并且可以确定与移动设备相关联的移动运营商相关的移动运营商数据。 处理器可以识别针对该请求的移动广告数据和移动广告动作以及移动运营商数据。 处理器可以将移动广告动作数据附加到移动广告数据。 处理器可以经由接口向移动设备提供移动广告数据与附加的移动广告动作数据。

    NANOSTRUCTURED FILMS AND RELATED METHODS
    9.
    发明申请
    NANOSTRUCTURED FILMS AND RELATED METHODS 有权
    纳米结构薄膜及相关方法

    公开(公告)号：US20130161614A1

    公开(公告)日：2013-06-27

    申请号：US13813022

    申请日：2011-07-29

    Applicant: Ashutosh Tiwari ,  Michael Snure ,  Makarand Karmarkar

    Inventor： Ashutosh Tiwari ,  Michael Snure ,  Makarand Karmarkar

    IPC: C25D11/02 ,  H01L31/032 ,  C25D21/10

    CPC classification number: C25D11/26 ,  C25D5/02 ,  C25D11/02 ,  C25D21/10 ,  H01G9/2031 ,  H01G9/2036 ,  H01G9/2059 ,  H01L31/032 ,  H01L51/0086 ,  H01M14/005 ,  Y02E10/542

    Abstract: Nanostructured films including a plurality of nanowells, the nanowells having a pore at the top surface of the film, the pore defining a channel that extends downwardly towards the bottom surface of the film are provided. Also provided are methods including exposing a growth substrate to an anodizing bath, applying ultrasonic vibrations to the anodizing bath, and generating a current through the anodizing bath to form the nanostructured film. The nanostructured films may be formed from TiO2 and may be used to provide solid state dye sensitized solar cells having high conversion efficiencies.

    Abstract translation: 提供包括多个纳米孔的纳米结构膜，纳米孔在膜的顶表面具有孔，孔限定向下朝向膜的底表面延伸的通道。 还提供了包括将生长衬底暴露于阳极氧化浴，向阳极氧化浴施加超声波振动并产生通过阳极氧化浴以形成纳米结构膜的电流的方法。 纳米结构膜可以由TiO 2形成，并且可以用于提供具有高转换效率的固态染料敏化太阳能电池。

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