公开(公告)号：US20070240013A1

公开(公告)日：2007-10-11

申请号：US11620877

申请日：2007-01-08

申请人： Atsushi Hayashi ,  Akiyuki Hatakeyama ,  Taichi Niki ,  Yoichi Nishino

发明人： Atsushi Hayashi ,  Akiyuki Hatakeyama ,  Taichi Niki ,  Yoichi Nishino

IPC分类号： G06F1/00

CPC分类号： G06F1/10 ,  G06F11/2043 ,  G06F11/24

摘要： An apparatus is disclosed which may include a plurality of circuit blocks, each circuit block including a separate clock grid; at least one oscillator circuit operable to select frequencies for at least two respective clock signals and to transmit the at least two clock signals to respective ones of said plurality of circuit blocks; and a control circuit coupled to the at least one oscillator circuit.

摘要翻译： 公开了一种可以包括多个电路块的装置，每个电路块包括单独的时钟网格; 至少一个振荡器电路，可操作以选择至少两个相应时钟信号的频率，并将所述至少两个时钟信号发送到所述多个电路块中的相应电路块; 以及耦合到所述至少一个振荡器电路的控制电路。

公开(公告)号：US07768287B2

公开(公告)日：2010-08-03

申请号：US11620873

申请日：2007-01-08

申请人： Atsushi Hayashi ,  Akiyuki Hatakeyama ,  Taichi Niki ,  Yoichi Nishino

发明人： Atsushi Hayashi ,  Akiyuki Hatakeyama ,  Taichi Niki ,  Yoichi Nishino

IPC分类号： G01R31/02 ,  G06F1/26

CPC分类号： G06F9/3885 ,  G06F11/2043

摘要： Methods and apparatus provide for: selectively supplying a first source of power to a plurality of circuit blocks of a system using a plurality of gate circuits responsive to respective control signals provided by at least one control circuit; and providing a second source of power to operate the control circuit before the first source of power is available to the gate circuits such that the control signals are valid before such availability.

摘要翻译： 方法和装置提供：响应于由至少一个控制电路提供的各个控制信号，使用多个门电路选择性地向系统的多个电路块提供第一电源; 以及在所述第一电源可用于所述门电路之前提供第二电源来操作所述控制电路，使得所述控制信号在所述可用性之前是有效的。

公开(公告)号：US20070176625A1

公开(公告)日：2007-08-02

申请号：US11620873

申请日：2007-01-08

申请人： Atsushi Hayashi ,  Akiyuki Hatakeyama ,  Taichi Niki ,  Yoichi Nishino

发明人： Atsushi Hayashi ,  Akiyuki Hatakeyama ,  Taichi Niki ,  Yoichi Nishino

IPC分类号： G01R31/36

CPC分类号： G06F9/3885 ,  G06F11/2043

摘要： Methods and apparatus provide for: selectively supplying a first source of power to a plurality of circuit blocks of a system using a plurality of gate circuits responsive to respective control signals provided by at least one control circuit; and providing a second source of power to operate the control circuit before the first source of power is available to the gate circuits such that the control signals are valid before such availability.

摘要翻译： 方法和装置提供：响应于由至少一个控制电路提供的各个控制信号，使用多个门电路选择性地向系统的多个电路块提供第一电源; 以及在所述第一电源可用于所述门电路之前提供第二电源来操作所述控制电路，使得所述控制信号在所述可用性之前是有效的。

公开(公告)号：US20080133989A1

公开(公告)日：2008-06-05

申请号：US11566819

申请日：2006-12-05

申请人： Atsushi Hayashi ,  Chiaki Takano ,  Noriyuki Oshima ,  Takeshi Inoue ,  Hiroki Kihara ,  Yoichi Nishino

发明人： Atsushi Hayashi ,  Chiaki Takano ,  Noriyuki Oshima ,  Takeshi Inoue ,  Hiroki Kihara ,  Yoichi Nishino

IPC分类号： G01R31/3185

CPC分类号： G01R31/318536 ,  G01R31/318541 ,  G01R31/318555

摘要： Methods and apparatus for dynamically (AC) testing a target circuit within a main circuit include: providing respective sets of input latches from among a plurality of latches of the main circuit; reconfiguring connections of at least some of the input latches from normal connections within the main circuit such that each set of input latches is connected in series and directs an input bit stream from an associated source node into an associated input node of the target circuit; scanning a plurality of sets of input bits into the respective sets of input latches such that each latch of each set of input latches contains a respective bit of an associated one of the sets of input bits; and scanning each of the sets of input bits serially into the respective input nodes of the target circuit at a sufficiently high frequency to dynamically test the target circuit.

摘要翻译： 用于动态（AC）测试主电路内的目标电路的方法和装置包括：从主电路的多个锁存器中提供各组输入锁存器; 重新配置至少一些输入锁存器与主电路内的正常连接的连接，使得每组输入锁存器串联连接，并将输入比特流从相关源节点引导到目标电路的相关输入节点; 将多组输入位扫描到相应的输入锁存器组中，使得每组输入锁存器的每个锁存器包含输入位组中相关联的一个组的相应位; 并且以足够高的频率将每组输入位串行地扫描到目标电路的相应输入节点中以动态测试目标电路。

公开(公告)号：US07676531B2

公开(公告)日：2010-03-09

申请号：US11318225

申请日：2005-12-22

申请人： Yoichi Nishino

发明人： Yoichi Nishino

IPC分类号： G06F1/00

CPC分类号： G11C29/52 ,  G06F7/588 ,  G11C11/41

摘要： Methods and apparatus provide for powering up a static random access memory (SRAM); interrogating at least some contents of the SRAM resulting from power up; and using the contents as at least a basis of a random number.

摘要翻译： 方法和装置为静态随机存取存储器（SRAM）供电; 询问由加电产生的SRAM中的至少一些内容; 并使用内容作为至少一个随机数的基础。

公开(公告)号：US20080189090A1

公开(公告)日：2008-08-07

申请号：US11671852

申请日：2007-02-06

申请人： Makoto Aikawa ,  Sang H. Dhong ,  Brian Flachs ,  Gilles Gervais ,  Yoichi Nishino ,  Iwao Takiguchi ,  Tetsuji Tamura ,  Yaping Zhou

发明人： Makoto Aikawa ,  Sang H. Dhong ,  Brian Flachs ,  Gilles Gervais ,  Yoichi Nishino ,  Iwao Takiguchi ,  Tetsuji Tamura ,  Yaping Zhou

IPC分类号： G06G7/62 ,  G06F17/50

CPC分类号： G06F17/5036 ,  G01R31/318357

摘要： A system and method for determining a guard band for an operating voltage of an integrated circuit device are provided. The system and method provide a mechanism for calculating the guard band based on a comparison of simulated noise obtained from a simulation of the integrated circuit device using a worst case waveform stimuli with simulated or measured power supply noise of a workload/test pattern that may be achieved using testing equipment. A scaling factor for the guard band is determined by comparing results of a simulation of a workload/test pattern with measured results of the workload/test pattern as applied to a hardware implementation of the integrated circuit device. This scaling factor is applied to a difference between the noise generated through simulation of the workload/test pattern and the noise generated through simulation of the worst case current waveform to generate a guard band value.

摘要翻译： 提供了一种用于确定集成电路装置的工作电压的保护带的系统和方法。 该系统和方法提供了一种基于使用最差情况波形刺激从集成电路装置的模拟获得的模拟噪声与可能是工作负载/测试模式的模拟或测量的电源噪声的比较来计算保护频带的机制 使用测试设备实现。 通过将工作负载/测试模式的仿真结果与应用于集成电路设备的硬件实现的工作负载/测试模式的测量结果进行比较来确定保护频带的缩放因子。 该缩放因子被应用于通过模拟工作负载/测试模式产生的噪声与通过模拟最坏情况电流波形产生的噪声之间的差异以产生保护带值。

公开(公告)号：US20130167893A1

公开(公告)日：2013-07-04

申请号：US13820786

申请日：2011-09-07

申请人： Yoichi Nishino ,  Suguru Tanaka

发明人： Yoichi Nishino ,  Suguru Tanaka

IPC分类号： H01L35/32 ,  H01L35/20

CPC分类号： H01L35/32 ,  C22C38/06 ,  C22C38/12 ,  H01L35/20

摘要： A thermoelectric material has a Heusler alloy type crystal structure and is based on an Fe2VAl basic structure having a total number of valence electrons of 24 per chemical formula. The thermoelectric material has a structure expressed by General Formula Fe2V1−ZAl1+Z, where 0.03≦z≦0.12, or General Formula Fe2V1−ZAl1+Z, where −0.12≦z≦−0.03, by controlling its chemical compositional ratio. The former acts as a p-type material and has a Seebeck coefficient whose absolute value reaches a peak at a temperature of 400 K or higher; and the latter acts as an n-type material and has a Seebeck coefficient whose absolute value reaches a peak at a temperature of 310 K or higher.

摘要翻译： 热电材料具有Heusler合金型晶体结构，并且基于每个化学式具有总数为24的价电子的Fe2VA1基本结构。 通过控制其化学组成比，热电材料具有由通式Fe2V1-ZAl1 + Z表示的结构，其中0.03 @ z @ 0.12或通式Fe2V1-ZAl1 + Z，其中-0.12 @ z @ -0.03。 前者用作p型材料，并且具有在400K或更高的温度下其绝对值达到峰值的塞贝克系数; 后者作为n型材料，并具有在310K以上的温度下绝对值达到峰值的塞贝克系数。

公开(公告)号：US20070147156A1

公开(公告)日：2007-06-28

申请号：US11318225

申请日：2005-12-22

申请人： Yoichi Nishino

发明人： Yoichi Nishino

IPC分类号： G11C5/14

CPC分类号： G11C29/52 ,  G06F7/588 ,  G11C11/41

摘要： Methods and apparatus provide for powering up a static random access memory (SRAM); interrogating at least some contents of the SRAM resulting from power up; and using the contents as at least a basis of a random number

摘要翻译： 方法和装置为静态随机存取存储器（SRAM）供电; 询问由加电产生的SRAM中的至少一些内容; 并使用内容作为至少一个随机数的基础

公开(公告)号：US09276189B2

公开(公告)日：2016-03-01

申请号：US13820786

申请日：2011-09-07

申请人： Yoichi Nishino ,  Suguru Tanaka

发明人： Yoichi Nishino ,  Suguru Tanaka

IPC分类号： H01L35/20 ,  H01L35/32 ,  C22C38/06 ,  C22C38/12

CPC分类号： H01L35/32 ,  C22C38/06 ,  C22C38/12 ,  H01L35/20

摘要： A thermoelectric material has a Heusler alloy type crystal structure and is based on an Fe2VAl basic structure having a total number of valence electrons of 24 per chemical formula. The thermoelectric material has a structure expressed by General Formula Fe2V1−ZAl1+Z, where 0.03≦z≦0.12, or General Formula Fe2V1−ZAl1+Z, where −0.12≦z≦−0.03, by controlling its chemical compositional ratio. The former acts as a p-type material and has a Seebeck coefficient whose absolute value reaches a peak at a temperature of 400 K or higher; and the latter acts as an n-type material and has a Seebeck coefficient whose absolute value reaches a peak at a temperature of 310 K or higher.

摘要翻译： 热电材料具有Heusler合金型晶体结构，并且基于每个化学式具有总数为24的价电子的Fe2VA1基本结构。 热电材料具有通式Fe2V1-ZAl1 + Z表示的结构，其中0.03＆nlE; z＆nlE; 0.12或通式Fe2V1-ZAl1 + Z，其中-0.12＆nlE; z＆nlE; -0.03，通过控制其化学组成比。 前者用作p型材料，并且具有在400K或更高的温度下其绝对值达到峰值的塞贝克系数; 后者作为n型材料，并具有在310K以上的温度下绝对值达到峰值的塞贝克系数。

公开(公告)号：US07602935B2

公开(公告)日：2009-10-13

申请号：US10678747

申请日：2003-10-06

申请人： Yoichi Nishino

发明人： Yoichi Nishino

IPC分类号： G06K9/00

CPC分类号： G06T7/0002 ,  G06K9/00577 ,  G06K2009/00583

摘要： A data processing apparatus and data processing method enabling a camera generating image data to be identified easily with a high reliability, which identify if a predetermined image generating apparatus having distinctive variations in light receiving intensity of individual light receiving elements and generating image data based on light receiving results of the plurality of light receiving elements generated the first image data to be identified, wherein a correlation detector detects correlation between first image data and second image data for reference generated using a predetermined image generating apparatus and a CPU identifies if the first image data was generated using an image generating apparatus based on that correlation.

摘要翻译： 一种数据处理装置和数据处理方法，其使得能够以高可靠性容易地识别生成图像数据的相机，其识别是否具有基于光的各个光接收元件的光接收强度的不同变化的预定图像生成装置和生成图像数据 多个光接收元件的接收结果产生要识别的第一图像数据，其中相关检测器检测第一图像数据和第二图像数据之间的相关性，以便使用预定图像生成装置产生参考，并且CPU识别第一图像数据 使用基于该相关性的图像生成装置生成。