公开(公告)号：US3767492A

公开(公告)日：1973-10-23

申请号：US3767492D

申请日：1971-10-12

Applicant: BELL TELEPHONE LABOR INC

Inventor： MAC RAE A ,  MOLINE R

IPC: H01L21/033 ,  H01L23/29 ,  H01L7/00

CPC classification number: H01L23/29 ,  H01L21/0332 ,  H01L21/0337 ,  H01L23/291 ,  H01L2924/0002 ,  Y10S148/043 ,  Y10S148/051 ,  Y10S148/114 ,  H01L2924/00

Abstract: The specification describes a masking technique for semiconductor processing in which the usual photolithographic mask is eliminated by the use of an ion beam resist technique. The ion beam exposure is performed through a shadow mask. The mask layer comprises a dual dielectric. Preferential etching of the exposed portions of the top layer is used initially to form the pattern and the patterned top layer is used as a mask for the underlayer. This is advantageous when the preferential etch ratio between the composite materials substantially exceeds the available etch ratio between the beam-exposed material and the unexposed material. The use of SiO2-Si3N4 and SiO2-Al2O3 composites are suggested. Ion-bombarded Si3N4 has been found to be susceptible to etching in HF so that a single etchant can be used for both layers of the SiO2-Si3N4 composite.

Abstract translation: 该说明书描述了半导体处理的掩模技术，其中通过使用离子束抗蚀剂技术消除了通常的光刻掩模。 通过荫罩进行离子束曝光。 掩模层包括双电介质。 首先使用顶层的暴露部分的优先蚀刻来形成图案，并且将图案化的顶层用作底层的掩模。 当复合材料之间的优选蚀刻比基本上超过曝光材料和未曝光材料之间的可用蚀刻比时，这是有利的。

公开(公告)号：US3713922A

公开(公告)日：1973-01-30

申请号：US3713922D

申请日：1970-12-28

Applicant: BELL TELEPHONE LABOR INC

Inventor： LEPSELTER M ,  MAC RAE A

IPC: C23F1/02 ,  C23F1/04 ,  H01L21/00 ,  H01L21/265

CPC classification number: H01L21/00 ,  C23F1/02 ,  C23F1/04 ,  H01L21/265 ,  Y10S148/051 ,  Y10S148/106 ,  Y10S148/115 ,  Y10S148/135 ,  Y10S430/143

Abstract: The specification describes a method for preparing a thin silicon high resolution shadow mask, the latter adapted especially for use in processing materials by ion implantation. The method makes use of the preferential etch technique for silicon in which, for example, n+ material can be electrolytically removed in preference to higher resistivity ntype silicon. A thin (e.g.

Abstract translation: 本说明书描述了一种制备薄硅高分辨率荫罩的方法，后者适用于通过离子注入在加工材料中的应用。 该方法利用硅的优选蚀刻技术，其中，例如，可以优选以较高电阻率的n型硅电解去除n +材料。 在n +衬底上沉积薄（例如<10微米）的n硅外延层。 然后将掩模的开放区域通过外延层的厚度转换为n +材料。 在暴露于优选电解蚀刻处理之后，留下薄的硅阴影掩模。 还公开了用于增强掩模的物理耐久性的肋结构和使用结晶蚀刻的技术以进一步提高分辨率。

公开(公告)号：US3801390A

公开(公告)日：1974-04-02

申请号：US3801390D

申请日：1972-09-25

Applicant: BELL TELEPHONE LABOR INC

Inventor： LEPSELTER M ,  MAC RAE A

IPC: C23F1/02 ,  C23F1/04 ,  H01L21/00 ,  H01L21/265 ,  H01L21/3063 ,  H01L7/50

CPC classification number: H01L21/3063 ,  C23F1/02 ,  C23F1/04 ,  H01L21/00 ,  H01L21/265 ,  Y10S438/944

Abstract: The specification describes a method for preparing a thin silicon high resolution shadow mask, the latter adapted especially for use in processing materials by ion implantation. The method makes use of the preferential etch technique for silicon in which, for example, n+ material can be electrolytically removed in preference to higher resistivity ntype silicon. A thin (e.g.

公开(公告)号：US3769109A

公开(公告)日：1973-10-30

申请号：US3769109D

申请日：1972-04-19

Applicant: BELL TELEPHONE LABOR INC

Inventor： MAC RAE A ,  MOLINE R

IPC: H01L23/29 ,  H01L7/50

CPC classification number: H01L21/31155 ,  H01L21/266 ,  H01L23/291 ,  H01L2924/0002 ,  Y10S148/02 ,  Y10S148/041 ,  Y10S148/042 ,  Y10S148/053 ,  Y10S148/106 ,  Y10S438/924 ,  Y10S438/978 ,  H01L2924/00

Abstract: During SiO2 etching, when the oxide surface etch rate is larger than the bulk etch rate and the photoresist adheres tenaciously to the surface, a near vertical wall or cusp will be formed. This will create potential fracture spots in sputtered or evaporated metal which covers the steps. In the fabrication of self-aligned gate IGFETs, where the gate material acts as a mask against either etching or ion implantation, holes in the step metal will allow regions under the nominal gate to be doped during the source-drain doping. The slope of an etched step can be controlled by fabricating a double layer in which the top layer etches faster than the bulk. The specification describes the use of the enhanced etch rate of ion bombarded SiO2 to generate controlled tapers on window openings.

Abstract translation: 在SiO2蚀刻期间，当氧化物表面蚀刻速率大于体蚀刻速率并且光致抗蚀剂牢固地粘附到表面时，将形成近垂直的壁或尖点。 这将在溅射或蒸发的金属中产生潜在的断裂点，覆盖了这些步骤。 在自对准栅极IGFET的制造中，其中栅极材料充当蚀刻或离子注入的掩模，阶跃金属中的空穴将允许在源极 - 漏极掺杂期间在标称栅极之下的区域被掺杂。

公开(公告)号：US3767925A

公开(公告)日：1973-10-23

申请号：US3767925D

申请日：1972-03-08

Applicant: BELL TELEPHONE LABOR INC

Inventor： FOLEY E ,  MAC RAE A ,  WHITE C ,  SIMMS D ,  TOLK N

IPC: G01N23/207 ,  G01Q30/08 ,  G01Q60/44 ,  H01J37/252 ,  H01J37/26

CPC classification number: G01N23/2073 ,  H01J37/252

Abstract: The spatial distribution of constituents and contaminants in a solid is determined either by (1) scanning the surface of the solid with a focused ion or neutral particle beam to sputter excited particles from the surface, resulting in photon emissions characteristic of the sputtered particles, and detecting the photon emissions over the scan period, or by (2) flooding the surface with a diffuse beam, and photographically recording the distribution of photon emissions. Continued sputtering results in removal of surface material and detection of the photon count rate or a sequence of photographs taken during each successive scan period indicates the distribution of constituents and contaminants in the bulk of the solid as a function of distance from the surface.

Abstract translation: 固体中成分和污染物的空间分布由（1）用聚焦离子或中性粒子束扫描固体的表面以从表面溅射激发的粒子来确定溅射粒子的光子发射特性， 在扫描周期内检测光子发射，或者（2）用漫射光束淹没该表面，并照相记录光子发射的分布。 继续溅射导致去除表面材料并且检测光子计数速率或在每个连续扫描周期期间拍摄的照片序列表示作为与表面的距离的函数的固体的大部分中的成分和污染物的分布。