公开(公告)号：US20160351588A1

公开(公告)日：2016-12-01

申请号：US15233255

申请日：2016-08-10

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Shi SHU ,  Feng ZHANG ,  Yaohui GU ,  Fang HE ,  Feng GU

IPC: H01L27/12 ,  H01L29/45 ,  G02F1/1368 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/1335 ,  G02F1/1339 ,  H01L21/768 ,  G02F1/1333

CPC classification number: H01L27/124 ,  G02F1/133345 ,  G02F1/133516 ,  G02F1/13394 ,  G02F1/134363 ,  G02F1/13439 ,  G02F1/136209 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136222 ,  G02F2001/136295 ,  G02F2201/121 ,  G02F2201/123 ,  H01L21/76802 ,  H01L21/76877 ,  H01L27/1288 ,  H01L29/458

Abstract: Embodiments of the disclosure disclose an array substrate and a fabrication method thereof, and a display device. The fabrication method of the array substrate comprises: forming a thin film transistor; forming a passivation layer covering the thin film transistor, the passivation layer having a via hole and the via hole exposing at least a portion of a drain electrode of the thin film transistor; forming a via-hole conductive layer, the via-hole conductive layer covering the portion of the drain electrode exposed at the via hole and connected to the drain electrode; treating the via-hole conductive layer, so that a reflectivity of the via-hole conductive layer is lower than a reflectivity of the drain electrode; and forming a pixel electrode, the pixel electrode being connected with the drain electrode through the via-hole conductive layer.

Abstract translation: 本发明的实施例公开了阵列基板及其制造方法以及显示装置。 阵列基板的制造方法包括：形成薄膜晶体管; 形成覆盖所述薄膜晶体管的钝化层，所述钝化层具有通孔，所述通孔暴露所述薄膜晶体管的漏电极的至少一部分; 形成通孔导电层，所述通孔导电层覆盖在所述通孔露出并与所述漏电极连接的所述漏电极的所述部分; 处理通孔导电层，使得通孔导电层的反射率低于漏电极的反射率; 并且形成像素电极，所述像素电极通过所述通孔导电层与所述漏电极连接。

公开(公告)号：US20160340581A1

公开(公告)日：2016-11-24

申请号：US14769097

申请日：2015-03-20

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Feng GU

IPC: C09K13/08 ,  C03C15/00

CPC classification number: C09K13/08 ,  C03C15/00

Abstract: The invention provides an etching solution, comprising: 10 to 30 wt % of phosphoric acid; 2 to 20 wt % of nitric acid; 6 to 18 wt % of hydrofluoric acid; 5 to 10 wt % of hydrochloric acid; and water, wherein the weight percentages are based on the weight of the etching solution. The etching solution can be used for thinning the substrate in large-scale production, dissolving the precipitated impurities attached to the surface of the substrate after substrate thinning so as to remove effectively the impurities on the surface of the substrate, improve the qualified ratio and passed ratio of a product, and at the same time, provide the effective insurance for controlling the thickness of the substrate.

Abstract translation: 本发明提供了一种蚀刻溶液，其包含：10〜30重量％的磷酸; 2〜20重量％的硝酸; 6〜18重量％的氢氟酸; 5〜10重量％的盐酸; 和水，其中重量百分比基于蚀刻溶液的重量。 蚀刻溶液可用于大规模生产中使基板变薄，在基板变薄后溶解附着在基板表面的沉淀杂质，有效去除基板表面的杂质，提高合格比例并通过 产品的比例，同时为控制基材的厚度提供了有效的保险。

公开(公告)号：US20160148838A1

公开(公告)日：2016-05-26

申请号：US14574721

申请日：2014-12-18

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Shi SHU ,  Feng ZHANG ,  Yaohui GU ,  Fang HE ,  Feng GU

IPC: H01L21/768 ,  G02F1/1362 ,  G02F1/1368 ,  H01L27/12

CPC classification number: H01L27/124 ,  G02F1/133345 ,  G02F1/133516 ,  G02F1/13394 ,  G02F1/134363 ,  G02F1/13439 ,  G02F1/136209 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136222 ,  G02F2001/136295 ,  G02F2201/121 ,  G02F2201/123 ,  H01L21/76802 ,  H01L21/76877 ,  H01L27/1288 ,  H01L29/458

Abstract: Embodiments of the disclosure disclose an array substrate and a fabrication method thereof, and a display device. The fabrication method of the array substrate comprises: forming a thin film transistor; forming a passivation layer covering the thin film transistor, the passivation layer having a via hole and the via hole exposing at least a portion of a drain electrode of the thin film transistor; forming a via-hole conductive layer, the via-hole conductive layer covering the portion of the drain electrode exposed at the via hole and connected to the drain electrode; treating the via-hole conductive layer, so that a reflectivity of the via-hole conductive layer is lower than a reflectivity of the drain electrode; and forming a pixel electrode, the pixel electrode being connected with the drain electrode through the via-hole conductive layer.

公开(公告)号：US20180314105A1

公开(公告)日：2018-11-01

申请号：US15810591

申请日：2017-11-13

Applicant: BOE Technology Group Co., Ltd.

Inventor： Shi SHU ,  Chuanxiang XU ,  Teng LUO ,  Feng GU

IPC: G02F1/1335 ,  G02F1/1339 ,  G02F1/1368 ,  G02F1/1362 ,  G02F1/1343

Abstract: The present disclosure provides a counter substrate, a display panel, a display device, and fabricating method, further simplifying the fabricating process of the display panel by reducing the number of masking times required during the making of a spacer pattern and a frame light shielding pattern while achieving the frame light shielding function of the counter substrate and getting the counter substrate conductive with an array substrate. The fabricating method of the counter substrate comprises: forming a transparent electrode layer on a first base substrate; forming a black spacer pattern and a frame light shielding pattern at the same time on the transparent electrode layer, wherein the frame light shielding pattern comprises a first via hole that exposes a portion of the transparent electrode layer; and forming a conductive light shielding layer pattern in the first via hole.