Array Substrate and Manufacturing Method Thereof

    公开(公告)号:US20180211888A1

    公开(公告)日:2018-07-26

    申请号:US15567786

    申请日:2017-03-03

    摘要: An array substrate and a manufacturing method thereof are provided. The method for manufacturing the array substrate includes: forming a passivation layer on a base substrate; forming photoresist on the passivation layer, and forming a first photoresist pattern including a photoresist-completely-retained region, a photoresist-partially-retained region and a photoresist-completely-removed region, by exposure and development processes; forming a first through hole in the passivation layer by etching the passivation layer with the first photoresist pattern as a mask; forming a second photoresist pattern by performing ashing on the first photoresist pattern to remove the photoresist in the photoresist-partially-retained region and reduce a thickness of the photoresist in the photoresist-completely-retained region; and etching the passivation layer with the second photoresist pattern as a mask, so as to reduce a thickness of the passivation layer in the photoresist-partially-retained region.

    Touch-controlled panel, method of manufacturing the same, and display device

    公开(公告)号:US10310647B2

    公开(公告)日:2019-06-04

    申请号:US15232949

    申请日:2016-08-10

    IPC分类号: H01L27/12 G06F3/041 G06F3/044

    摘要: Embodiments of the present invention discloses a touch-controlled panel and a method of manufacturing the same, and a display device, to reduce the number of masks and production cost. The method of manufacturing a touch-controlled panel includes: forming a first electrode and a second electrode on a substrate through a patterning process, the first electrode and the second electrode being broken at a position where they are overlapped; depositing a layer of an organic film and forming an organic film fully remained region, an organic film partially remained region and an organic film removed region from the organic film through a mask; depositing a conductive layer and coating a photoresist on the conductive layer, and then forming a photoresist fully remained region, a photoresist partially remained region and a photoresist removed region through the mask.

    Array substrate and manufacturing method thereof

    公开(公告)号:US10332807B2

    公开(公告)日:2019-06-25

    申请号:US15567786

    申请日:2017-03-03

    摘要: An array substrate and a manufacturing method thereof are provided. The method for manufacturing the array substrate includes: forming a passivation layer on a base substrate; forming photoresist on the passivation layer, and forming a first photoresist pattern including a photoresist-completely-retained region, a photoresist-partially-retained region and a photoresist-completely-removed region, by exposure and development processes; forming a first through hole in the passivation layer by etching the passivation layer with the first photoresist pattern as a mask; forming a second photoresist pattern by performing ashing on the first photoresist pattern to remove the photoresist in the photoresist-partially-retained region and reduce a thickness of the photoresist in the photoresist-completely-retained region; and etching the passivation layer with the second photoresist pattern as a mask, so as to reduce a thickness of the passivation layer in the photoresist-partially-retained region.

    Transistor and method for manufacturing the same, display substrate, and display apparatus

    公开(公告)号:US10923597B2

    公开(公告)日:2021-02-16

    申请号:US16427730

    申请日:2019-05-31

    摘要: A transistor and a method for manufacturing the same, a display substrate, and a display apparatus are provided. The transistor may include: a substrate; an active region on the substrate and including a polycrystalline silicon region; an etch stop layer at a side of the polycrystalline silicon region distal to the substrate; and a first heavily doped amorphous silicon region and a second heavily doped amorphous silicon region both at a side of the etch stop layer distal to the substrate; the polycrystalline silicon region having a first side surface corresponding to the first heavily doped amorphous silicon region and a second side surface corresponding to the second heavily doped amorphous silicon region; wherein an orthographic projection of the polycrystalline silicon region on a plane in which a lower surface of the etch stop layer lies does not go beyond the lower surface of the etch stop layer.