Micro power generation device and electronic apparatus with the same

    公开(公告)号:US11539307B2

    公开(公告)日:2022-12-27

    申请号:US16770208

    申请日:2020-01-14

    IPC分类号: H02N1/04 B81B1/00 B81B7/00

    摘要: The present disclosure proposes a micro power generation device including a plurality of generators stacked one above the other. Each of the plurality of generators includes: an upper electrode and a lower electrode spaced up and down; a spacer provided between peripheral edges of the upper electrode and the lower electrode; an upper friction material layer provided on a side of the upper electrode facing the lower electrode; and a lower friction material layer provided on a side of the lower electrode facing the upper electrode. The upper friction material layer, the lower friction material layer and the spacer together form a cavity. An intermediate spacer is provided between each adjacent two generators, each adjacent two generators and the intermediate spacer together form an intermediate cavity, and the intermediate cavity is filled with gas. A cavity of an upper one of any two adjacent generators communicates with the intermediate cavity between the two adjacent generators.

    Semiconductor Device, Manufacturing Method Thereof, and Power Generating Device

    公开(公告)号:US20210226257A1

    公开(公告)日:2021-07-22

    申请号:US16765967

    申请日:2019-12-18

    摘要: The present disclosure provides a semiconductor device, a manufacturing method thereof, and a power generating device. The semiconductor device includes a substrate and a thin film battery on the substrate. The thin film battery includes at least one anode structure and at least one cathode structure on the substrate, and a solid electrolyte layer spacing the at least one anode structure apart from the at least one cathode structure. Each anode structure includes an anode current collector on a surface of the substrate and an anode layer on the surface of the substrate and connected to a side surface of the anode current collector. Each cathode structure includes a cathode current collector on the surface of the substrate and a cathode layer on the surface of the substrate and connected to a side surface of the cathode current collector.

    Counter, pixel circuit, display panel and display device

    公开(公告)号:US11295651B2

    公开(公告)日:2022-04-05

    申请号:US16939188

    申请日:2020-07-27

    摘要: Counter, pixel circuit, display panel, display device are provided. The counter includes: start-up circuit generating and outputting start-up signal by clock signal; M first and M second combinational logic circuits, alternate and cascaded, where M is integer no less than 1. Input terminal of first combinational logic circuit is coupled to output terminal of start-up circuit or second combinational logic circuit of previous stage, input terminal of second combinational logic circuit is coupled to output terminal of first combinational logic circuit of previous stage. Clock signal terminals of first, second combinational logic circuits are for inputting clock signal. First combinational logic circuit is for outputting clock signal in first time period and continuously outputting low level signal in second time period. Second combinational logic circuit is for outputting inverted signal of clock signal in third time period and continuously outputting low level signal in fourth time period.

    COUNTER, PIXEL CIRCUIT, DISPLAY PANEL AND DISPLAY DEVICE

    公开(公告)号:US20210097914A1

    公开(公告)日:2021-04-01

    申请号:US16939188

    申请日:2020-07-27

    摘要: Counter, pixel circuit, display panel, display device are provided. The counter includes: start-up circuit generating and outputting start-up signal by clock signal; M first and M second combinational logic circuits, alternate and cascaded, where M is integer no less than 1. Input terminal of first combinational logic circuit is coupled to output terminal of start-up circuit or second combinational logic circuit of previous stage, input terminal of second combinational logic circuit is coupled to output terminal of first combinational logic circuit of previous stage. Clock signal terminals of first, second combinational logic circuits are for inputting clock signal. First combinational logic circuit is for outputting clock signal in first time period and continuously outputting low level signal in second time period. Second combinational logic circuit is for outputting inverted signal of clock signal in third time period and continuously outputting low level signal in fourth time period.

    Optical communication switch, optical controlling method, array substrate, and display device

    公开(公告)号:US10921681B2

    公开(公告)日:2021-02-16

    申请号:US16388643

    申请日:2019-04-18

    IPC分类号: G02F1/01 G02F1/19 G02F1/00

    摘要: An optical communication switch, an optical controlling method, an array substrate and a display device are provided, the optical communication switch including: a first substrate and a second substrate opposite thereto; a first optical medium layer formed therebetween by a phase-change material, which has a first refractive index in a first state in which light rays implement one of an optical path state and an optical drop state, and a second refractive index in a second state in which light rays implement the other one of the optical path state and the optical drop state; a second optical medium layer also formed therebetween and in contact with the first optical medium layer by abutting against it closely, the second optical medium layer having a refractive index matching the first or second refractive index; and a heating device enabling the phase-change material to switch between the first and second states.