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公开(公告)号：US20230010947A1
公开(公告)日：2023-01-12
申请号：US17757305
申请日：2021-05-25
发明人： Shuai WANG , Yadong MU , Jie FENG , Yiming Bai , Xiangye Wei , Qiong Wu , Ge OU , Nan ZHUANG , Guoqiang GONG
IPC分类号： G06F3/14 , G06V10/25 , G06V10/764 , G06V40/10 , G06T7/194 , G06T7/70 , G06T3/40 , G06T5/00 , G09G3/00
摘要： Disclosed are an electronic apparatus, and a method for displaying an image on a display device. The electronic apparatus comprises: a display device; an image acquisition device, which is configured to acquire a surrounding image of the display device; and a processor, which is configured to determine a background image of the display device according to the surrounding image, acquire a target range, and a target object in the background image, determine a target image according to the background image, the target range and the target object, and control the display device to display the target image, wherein the target image does not include the target object.
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公开(公告)号：US11893142B2
公开(公告)日：2024-02-06
申请号：US17503167
申请日：2021-10-15
发明人： Xiangye Wei , Yiming Bai , Liming Xiu
CPC分类号： G06F21/725 , G06F1/08 , G06F21/73 , G06F2221/2103
摘要： A digital fingerprint generation circuit based on an integrated circuit is provided. In the digital fingerprint generation circuit, a control unit is configured to: generate a first control word and a second control word, and transmit the first control word and the second control word to a first clock generator and a second clock generator respectively, so that the first clock generator generates a first clock signal based on the first control word, and the second clock generator generates a second clock signal based on the second control word; and a frequency detector generates a digital fingerprint of the integrated circuit based on the first clock signal and the second clock signal.
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公开(公告)号：US12039766B2
公开(公告)日：2024-07-16
申请号：US17754158
申请日：2021-04-15
发明人： Jie Feng , Yadong Mu , Shuai Wang , Guiyu Tian , Yiming Bai , Xiangye Wei , Ge Ou , Qiong Wu
IPC分类号： G06V10/26 , G06V10/44 , G06V10/764 , G06V10/774 , G06V10/82 , G06V10/84 , G06V20/40 , G06V30/19 , G06V30/262
CPC分类号： G06V10/26 , G06V10/44 , G06V10/764 , G06V10/774 , G06V10/82 , G06V10/84 , G06V20/41 , G06V30/19147 , G06V30/274
摘要： The present disclosure provides an image processing method, apparatus, device, and computer-readable storage medium. The method includes: obtaining an image dataset, the image dataset including an image and an accompanying text related to an unseen class in the image; and generating a probability and/or distribution of the unseen class using an unseen class obtaining model, the probability and/or distribution of the unseen class including a probability that each pixel in the image is from the unseen class, a probability that the unseen class is present in the image, and a regional probability after the image is subdivided into a plurality of regions.
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公开(公告)号：US12001746B2
公开(公告)日：2024-06-04
申请号：US17757305
申请日：2021-05-25
发明人： Shuai Wang , Yadong Mu , Jie Feng , Yiming Bai , Xiangye Wei , Qiong Wu , Ge Ou , Nan Zhuang , Guoqiang Gong
IPC分类号： G06F3/14 , G06T3/4038 , G06T5/00 , G06T7/194 , G06T7/70 , G06V10/25 , G06V10/764 , G06V40/10 , G09G3/00
CPC分类号： G06F3/14 , G06T3/4038 , G06T5/005 , G06T7/194 , G06T7/70 , G06V10/25 , G06V10/764 , G06V40/103 , G09G3/035 , G06V2201/07 , G09G2380/02
摘要： An electronic apparatus and a method for displaying an image on a display device are disclosed. The electronic apparatus includes a display device; an image acquisition device configured to acquire a surrounding image of the display device; and a processor configured to: determine a background image of the display device according to the surrounding image; acquire a target range and a target object in the background image; determine a target image according to the background image, the target range and the target object; and control the display device to display the target image, wherein the target image excludes the target object.
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公开(公告)号：US11868511B2
公开(公告)日：2024-01-09
申请号：US17794142
申请日：2021-08-05
发明人： Xiangye Wei , Yiming Bai , Liming Xiu
摘要： Provided is a digital fingerprint generator. The digital fingerprint generator includes: a control circuit, configured to generate a control word; a first pulse generation circuit, connected to the control circuit, and configured to output a first pulse signal in response to the control word; a second pulse generation circuit, connected to the control circuit, having a same structure as the first pulse generation circuit, and configured to output a second pulse signal in response to the control word; and an output circuit, connected to the first pulse generation circuit and the second pulse generation circuit, and configured to output a digital fingerprint based on the first pulse signal and the second pulse signal according to a predetermined first rule.
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公开(公告)号：US11799578B2
公开(公告)日：2023-10-24
申请号：US17413367
申请日：2020-01-19
发明人： Xiangye Wei , Liming Xiu , Yiming Bai
CPC分类号： H04J3/0658 , H03L7/18 , H04J3/0641 , H04J3/0679
摘要： This is provided a time synchronization method, including: an adjustment stage including N adjustment cycles, N being an integer greater than 1; in each adjustment cycle, generating a physical clock signal at least according to a pre-acquired frequency control word corresponding to the adjustment cycle, and obtaining logical time at least according to the physical clock signal and a physical time deviation; a clock slope of the physical clock signal generated in each adjustment cycle reaches its corresponding target value, and the target values of the clock slopes of the physical clock signals in the N adjustment cycles gradually approach 1; the physical time deviation is: a time difference between the reference time and the physical time corresponding to the physical clock signal in an Nth adjustment cycle at the end of the Nth adjustment cycle. A time synchronization device and a network node device are provided.
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公开(公告)号：US11031926B2
公开(公告)日：2021-06-08
申请号：US16975267
申请日：2019-10-21
发明人： Xiangye Wei , Liming Xiu , Yiming Bai , Xin Li
摘要： A digital clock circuit is provided. The digital clock circuit includes a first sub-circuit comprising a first digitally-controlled oscillator driven by a frequency control word to control a first output frequency synthesized from multiple first pulses, and a first frequency divider to generate a trigger signal having a frequency equal to 1/M of the first output frequency. The digital clock circuit also includes a second sub-circuit comprising a loop of feedback including a frequency detector to compare an input frequency with a feedback frequency, a controller to adjust the frequency control word, a second digitally-controlled oscillator driven by the frequency control word plus a constant to control a second output frequency synthesized from multiple second pulses induced by the trigger signal, and a second frequency divider to set the feedback frequency equal to 1/N of the second output frequency in the loop of feedback.
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公开(公告)号：US11831321B2
公开(公告)日：2023-11-28
申请号：US17772482
申请日：2021-06-08
发明人： Aixiang Qi , Xiangye Wei , Yiming Bai , Jie Feng , Shuai Wang , Kening Zhao
IPC分类号： H03L7/083 , H03K3/017 , H03K19/17784 , H03L7/099
CPC分类号： H03L7/083 , H03K3/017 , H03K19/17784 , H03L7/0995
摘要： Provided is a clock signal generation circuit. The clock signal generation circuit includes a control word generation circuit, an initial clock generation circuit and a spread spectrum clock generation circuit, wherein the control word generation circuit is connected to the initial clock generation circuit and the spread spectrum clock generation circuit; the initial clock generation circuit is further connected to the spread spectrum clock generation circuit.
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公开(公告)号：US11139819B2
公开(公告)日：2021-10-05
申请号：US16651511
申请日：2019-04-23
发明人： Yuhai Ma , Xiangye Wei , Liming Xiu , Yiming Bai
摘要： A parameter determination method for a spread spectrum circuit, a clock spread spectrum method, a parameter determination device for a spread spectrum circuit, and a clock spread spectrum device are disclosed. The parameter determination method for the spread spectrum circuit includes: obtaining a base time unit and a target frequency; determining a spread spectrum depth coefficient according to the base time unit and the target frequency; determining whether the spread spectrum depth coefficient is greater than or equal to a base spread spectrum depth coefficient; if yes, determining the spread spectrum depth coefficient as a standard spread spectrum depth coefficient and determining a standard frequency control word according to the standard spread spectrum depth coefficient; and if no, adjusting the base time unit until a corresponding spread spectrum depth coefficient corresponding to the base time unit is greater than or equal to the base spread spectrum depth coefficient.
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公开(公告)号：US20210119618A1
公开(公告)日：2021-04-22
申请号：US16975267
申请日：2019-10-21
发明人： Xiangye Wei , Liming Xiu , Yiming Bai , Xin Li
摘要： A digital clock circuit is provided. The digital clock circuit includes a first sub-circuit comprising a first digitally-controlled oscillator driven by a frequency control word to control a first output frequency synthesized from multiple first pulses, and a first frequency divider to generate a trigger signal having a frequency equal to 1/M of the first output frequency. The digital clock circuit also includes a second sub-circuit comprising a loop of feedback including a frequency detector to compare an input frequency with a feedback frequency, a controller to adjust the frequency control word, a second digitally-controlled oscillator driven by the frequency control word plus a constant to control a second output frequency synthesized from multiple second pulses induced by the trigger signal, and a second frequency divider to set the feedback frequency equal to 1/N of the second output frequency in the loop of feedback.
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