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    Semiconductor memory device and method of manufacturing the same
    1.
    发明授权
    Semiconductor memory device and method of manufacturing the same 有权
    半导体存储器件及其制造方法

    公开(公告)号：US09530899B2

    公开(公告)日：2016-12-27

    申请号：US14474942

    申请日：2014-09-02

    申请人： Bi O Kim ,  Jin-Tae Noh ,  Su-Jin Shin ,  Jae-Young Ahn ,  Ki-Hyun Hwang

    发明人： Bi O Kim ,  Jin-Tae Noh ,  Su-Jin Shin ,  Jae-Young Ahn ,  Ki-Hyun Hwang

    IPC分类号： H01L29/792 ,  H01L27/115 ,  G11C16/04 ,  H01L21/28 ,  H01L29/66

    CPC分类号： H01L29/7926 ,  H01L21/28282 ,  H01L27/11582 ,  H01L29/66833

    摘要： A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes insulation layers and gate electrodes alternately stacked on a substrate, a vertical channel vertically passing through the insulation layers and the gate electrodes, and a threshold voltage controlling insulation layer, a tunnel insulation layer and a charge storage layer disposed between the vertical channel and the gate electrodes, wherein the threshold voltage controlling insulation layer is disposed between the charge storage layer and the vertical channel and including a material configured to suppress an inversion layer from being formed in the vertical channel.

    摘要翻译： 提供半导体器件及其制造方法。 半导体器件包括交替层叠在基板上的绝缘层和栅极电极，垂直通过绝缘层和栅电极的垂直沟道，以及设置在垂直线之间的阈值电压控制绝缘层，隧道绝缘层和电荷存储层 沟道和栅电极，其中所述阈值电压控制绝缘层设置在所述电荷存储层和所述垂直沟道之间，并且包括被配置为抑制在所述垂直沟道中形成反型层的材料。

    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
    2.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    半导体存储器件及其制造方法

    公开(公告)号：US20150129954A1

    公开(公告)日：2015-05-14

    申请号：US14474942

    申请日：2014-09-02

    申请人： Bi O. Kim ,  Jin-Tae Noh ,  Su-Jin Shin ,  Jae-Young Ahn ,  Ki-Hyun Hwang

    发明人： Bi O. Kim ,  Jin-Tae Noh ,  Su-Jin Shin ,  Jae-Young Ahn ,  Ki-Hyun Hwang

    IPC分类号： H01L29/792

    CPC分类号： H01L29/7926 ,  H01L21/28282 ,  H01L27/11582 ,  H01L29/66833

    摘要： A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes insulation layers and gate electrodes alternately stacked on a substrate, a vertical channel vertically passing through the insulation layers and the gate electrodes, and a threshold voltage controlling insulation layer, a tunnel insulation layer and a charge storage layer disposed between the vertical channel and the gate electrodes, wherein the threshold voltage controlling insulation layer is disposed between the charge storage layer and the vertical channel and including a material configured to suppress an inversion layer from being formed in the vertical channel.

    摘要翻译： 提供半导体器件及其制造方法。 半导体器件包括交替层叠在基板上的绝缘层和栅极电极，垂直通过绝缘层和栅电极的垂直沟道，以及设置在垂直线之间的阈值电压控制绝缘层，隧道绝缘层和电荷存储层 沟道和栅电极，其中所述阈值电压控制绝缘层设置在所述电荷存储层和所述垂直沟道之间，并且包括被配置为抑制在所述垂直沟道中形成反型层的材料。

    Vertical Memory Devices and Methods of Manufacturing the Same
    4.
    发明申请
    Vertical Memory Devices and Methods of Manufacturing the Same 有权
    垂直存储器件及其制造方法

    公开(公告)号：US20140024189A1

    公开(公告)日：2014-01-23

    申请号：US13943911

    申请日：2013-07-17

    申请人： Bi-O Kim ,  Toshiro Nakanishi ,  Jin-Tae Noh ,  Chang-Woo Sun ,  Seung-Hyun Lim ,  Jae-Young Ahn ,  Ki-Hyun Hwang

    发明人： Bi-O Kim ,  Toshiro Nakanishi ,  Jin-Tae Noh ,  Chang-Woo Sun ,  Seung-Hyun Lim ,  Jae-Young Ahn ,  Ki-Hyun Hwang

    IPC分类号： H01L29/66

    CPC分类号： H01L29/66666 ,  H01L21/8239 ,  H01L27/1157 ,  H01L27/11582 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7889 ,  H01L29/7926

    摘要： Methods of fabricating vertical memory devices are provided including forming a plurality of alternating insulating layers and sacrificial layers on a substrate; patterning and etching the plurality of insulating layer and sacrificial layers to define an opening that exposes at least a portion of a surface of the substrate; forming a charge trapping pattern and a tunnel insulating pattern on a side wall of the opening; forming a channel layer on the tunnel insulating layer on the sidewall of the opening, the channel layer including N-type impurity doped polysilicon; forming a buried insulating pattern on the channel layer in the opening; and forming a blocking dielectric layer and a control gate on the charge trapping pattern of one side wall of the channel layer.

    摘要翻译： 提供制造垂直存储器件的方法包括在衬底上形成多个交替绝缘层和牺牲层; 图案化和蚀刻所述多个绝缘层和牺牲层以限定暴露所述衬底的表面的至少一部分的开口; 在开口的侧壁上形成电荷捕获图案和隧道绝缘图案; 在开口的侧壁上的隧道绝缘层上形成沟道层，沟道层包括N型杂质掺杂多晶硅; 在开口中的沟道层上形成掩埋绝缘图案; 以及在沟道层的一个侧壁的电荷捕获图案上形成阻挡电介质层和控制栅极。

    Methods of fabricating silicon oxide layers using inorganic silicon precursors and methods of fabricating semiconductor devices including the same
    5.
    发明授权
    Methods of fabricating silicon oxide layers using inorganic silicon precursors and methods of fabricating semiconductor devices including the same 失效
    使用无机硅前体制造氧化硅层的方法和制造包括其的半导体器件的方法

    公开(公告)号：US08227357B2

    公开(公告)日：2012-07-24

    申请号：US12730406

    申请日：2010-03-24

    申请人： In-Sun Yi ,  Ki-Hyun Hwang ,  Jin-Tae Noh ,  Jae-Young Ahn ,  Si-Young Choi

    发明人： In-Sun Yi ,  Ki-Hyun Hwang ,  Jin-Tae Noh ,  Jae-Young Ahn ,  Si-Young Choi

    IPC分类号： H01L21/31 ,  H01L21/469

    CPC分类号： H01L21/28273 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02219 ,  H01L21/0228 ,  H01L21/28282 ,  H01L21/3185 ,  H01L27/11521 ,  H01L27/11568

    摘要： Methods of fabricating a silicon oxide layer using an inorganic silicon precursor and methods of fabricating a semiconductor device using the same are provided. The methods of fabricating a semiconductor device include forming a tunnel insulating layer and a charge storage layer on a substrate; forming a dielectric layer structure on the charge storage layer using an atomic layer deposition (ALD) method, the dielectric layer structure including a first dielectric layer formed of silicon oxide, a second dielectric layer on the first dielectric layer formed of a material different from the material forming the first dielectric layer, and a third dielectric layer formed of the silicon oxide on the second dielectric layer; and forming a control gate on the dielectric layer structure. The first and third dielectric layers formed of the silicon oxide are formed using a first gas including an inorganic silicon precursor, a second gas including hydrogen gas or a hydrogen component, and a third gas including an oxide gas.

    摘要翻译： 提供了使用无机硅前体制造氧化硅层的方法和使用其制造半导体器件的方法。 制造半导体器件的方法包括在衬底上形成隧道绝缘层和电荷存储层; 使用原子层沉积（ALD）方法在所述电荷存储层上形成电介质层结构，所述电介质层结构包括由氧化硅形成的第一电介质层，所述第一电介质层上的第二电介质层由不同于 形成第一电介质层的材料和由第二电介质层上的氧化硅形成的第三电介质层; 以及在介电层结构上形成控制栅极。 由氧化硅形成的第一和第三电介质层使用包括无机硅前体的第一气体，包括氢气或氢组分的第二气体和包括氧化物气体的第三气体形成。

    METHODS OF FABRICATING SILICON OXIDE LAYERS USING INORGANIC SILICON PRECURSORS AND METHODS OF FABRICATING SEMICONDUCTOR DEVICES INCLUDING THE SAME
    6.
    发明申请
    METHODS OF FABRICATING SILICON OXIDE LAYERS USING INORGANIC SILICON PRECURSORS AND METHODS OF FABRICATING SEMICONDUCTOR DEVICES INCLUDING THE SAME 失效
    使用无机硅前驱体制造氧化硅层的方法和制备包括其的半导体器件的方法

    公开(公告)号：US20100248465A1

    公开(公告)日：2010-09-30

    申请号：US12730406

    申请日：2010-03-24

    申请人： In-Sun Yi ,  Ki-Hyun Hwang ,  Jin-Tae Noh ,  Jae-Young Ahn ,  Si-Young Choi

    发明人： In-Sun Yi ,  Ki-Hyun Hwang ,  Jin-Tae Noh ,  Jae-Young Ahn ,  Si-Young Choi

    IPC分类号： H01L21/336 ,  H01L21/31 ,  H01L21/3205

    CPC分类号： H01L21/28273 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02219 ,  H01L21/0228 ,  H01L21/28282 ,  H01L21/3185 ,  H01L27/11521 ,  H01L27/11568

    摘要： Methods of fabricating a silicon oxide layer using an inorganic silicon precursor and methods of fabricating a semiconductor device using the same are provided. The methods of fabricating a semiconductor device include forming a tunnel insulating layer and a charge storage layer on a substrate; forming a dielectric layer structure on the charge storage layer using an atomic layer deposition (ALD) method, the dielectric layer structure including a first dielectric layer formed of silicon oxide, a second dielectric layer on the first dielectric layer formed of a material different from the material forming the first dielectric layer, and a third dielectric layer formed of the silicon oxide on the second dielectric layer; and forming a control gate on the dielectric layer structure. The first and third dielectric layers formed of the silicon oxide are formed using a first gas including an inorganic silicon precursor, a second gas including hydrogen gas or a hydrogen component, and a third gas including an oxide gas.

    摘要翻译： 提供了使用无机硅前体制造氧化硅层的方法和使用其制造半导体器件的方法。 制造半导体器件的方法包括在衬底上形成隧道绝缘层和电荷存储层; 使用原子层沉积（ALD）方法在所述电荷存储层上形成电介质层结构，所述电介质层结构包括由氧化硅形成的第一电介质层，所述第一电介质层上的第二电介质层由不同于 形成第一电介质层的材料和由第二电介质层上的氧化硅形成的第三电介质层; 以及在介电层结构上形成控制栅极。 由氧化硅形成的第一和第三电介质层使用包括无机硅前体的第一气体，包括氢气或氢组分的第二气体和包括氧化物气体的第三气体形成。

    Methods of manufacturing semiconductor devices
    9.
    发明授权
    Methods of manufacturing semiconductor devices 有权
    制造半导体器件的方法

    公开(公告)号：US08445367B2

    公开(公告)日：2013-05-21

    申请号：US13287509

    申请日：2011-11-02

    申请人： Jin-Tae Noh ,  Hun-Hyeong Lim ,  Ki-Hyun Hwang ,  Jin-Gyun Kim ,  Sang-Ryol Yang

    发明人： Jin-Tae Noh ,  Hun-Hyeong Lim ,  Ki-Hyun Hwang ,  Jin-Gyun Kim ,  Sang-Ryol Yang

    IPC分类号： H01L21/20 ,  H01L21/36

    CPC分类号： H01L27/1157 ,  H01L27/10855 ,  H01L27/11582

    摘要： In a method of manufacturing a semiconductor device, a plurality of sacrificial layers and a plurality of insulating interlayers are repeatedly and alternately on a substrate. The insulating interlayers include a different material from a material of the sacrificial layers. At least one opening through the insulating interlayers and the sacrificial layers are formed. The at least one opening exposes the substrate. The seed layer is formed on an inner wall of the at least one opening using a first silicon source gas. A polysilicon channel is formed in the at least one opening by growing the seed layer. The sacrificial layers are removed to form a plurality of grooves between the insulating interlayers. A plurality of gate structures is formed in the grooves, respectively.

    摘要翻译： 在制造半导体器件的方法中，多个牺牲层和多个绝缘中间层在衬底上重复交替。 绝缘夹层包括与牺牲层的材料不同的材料。 通过绝缘夹层和牺牲层形成至少一个开口。 至少一个开口露出基板。 种子层使用第一硅源气体形成在至少一个开口的内壁上。 通过种植种子层在至少一个开口中形成多晶硅沟道。 去除牺牲层以在绝缘夹层之间形成多个凹槽。 在槽中分别形成有多个栅极结构。