Double and triple gate MOSFET devices and methods for making same
    1.
    发明授权
    Double and triple gate MOSFET devices and methods for making same 有权
    双栅极和三栅极MOSFET器件及其制造方法

    公开(公告)号:US08222680B2

    公开(公告)日:2012-07-17

    申请号:US10274961

    申请日:2002-10-22

    IPC分类号: H01L29/72

    摘要: A double gate metal-oxide semiconductor field-effect transistor (MOSFET) includes a fin, a first gate and a second gate. The first gate is formed on top of the fin. The second gate surrounds the fin and the first gate. In another implementation, a triple gate MOSFET includes a fin, a first gate, a second gate, and a third gate. The first gate is formed on top of the fin. The second gate is formed adjacent the fin. The third gate is formed adjacent the fin and opposite the second gate.

    摘要翻译: 双栅极金属氧化物半导体场效应晶体管(MOSFET)包括鳍状物,第一栅极和第二栅极。 第一个门形成在鳍的顶部。 第二个门围绕翅片和第一个门。 在另一实施方案中,三栅极MOSFET包括鳍片,第一栅极,第二栅极和第三栅极。 第一个门形成在鳍的顶部。 第二个门形成在翅片附近。 第三栅极形成在翅片附近并与第二栅极相对。

    Double and triple gate MOSFET devices and methods for making same
    3.
    发明授权
    Double and triple gate MOSFET devices and methods for making same 有权
    双栅极和三栅极MOSFET器件及其制造方法

    公开(公告)号:US08580660B2

    公开(公告)日:2013-11-12

    申请号:US13523603

    申请日:2012-06-14

    IPC分类号: H01L29/72

    摘要: A double gate metal-oxide semiconductor field-effect transistor (MOSFET) includes a fin, a first gate and a second gate. The first gate is formed on top of the fin. The second gate surrounds the fin and the first gate. In another implementation, a triple gate MOSFET includes a fin, a first gate, a second gate, and a third gate. The first gate is formed on top of the fin. The second gate is formed adjacent the fin. The third gate is formed adjacent the fin and opposite the second gate.

    摘要翻译: 双栅极金属氧化物半导体场效应晶体管(MOSFET)包括鳍状物,第一栅极和第二栅极。 第一个门形成在鳍的顶部。 第二个门围绕翅片和第一个门。 在另一实施方案中,三栅极MOSFET包括鳍片,第一栅极,第二栅极和第三栅极。 第一个门形成在鳍的顶部。 第二个门形成在翅片附近。 第三栅极形成在翅片附近并与第二栅极相对。

    Method for forming fins in a FinFET device using sacrificial carbon layer
    8.
    发明授权
    Method for forming fins in a FinFET device using sacrificial carbon layer 有权
    在使用牺牲碳层的FinFET器件中形成翅片的方法

    公开(公告)号:US06645797B1

    公开(公告)日:2003-11-11

    申请号:US10310926

    申请日:2002-12-06

    IPC分类号: H01L2184

    CPC分类号: H01L29/785 H01L29/66795

    摘要: A method for forming a fin in a semiconductor device that includes a substrate, an insulating layer formed on the substrate, and a conductive layer formed on the insulating layer, includes forming a carbon layer over the conductive layer and forming a mask over the carbon layer. The method further includes etching the mask and carbon layer to form at least one structure, where the structure has a first width, reducing the width of the carbon layer in the at least one structure to a second width, depositing an oxide layer to surround the at least one structure, removing a portion of the oxide layer and the mask, removing the carbon layer to form an opening in a remaining portion of the oxide layer for each of the at least one structure, filling the at least one opening with conductive material, and removing the remaining portion of the oxide layer and a portion of the conductive layer to form the fin.

    摘要翻译: 一种在半导体器件中形成翅片的方法,包括:衬底,形成在衬底上的绝缘层和形成在绝缘层上的导电层,包括在导电层上形成碳层,并在碳层上形成掩模 。 该方法还包括蚀刻掩模和碳层以形成至少一种结构,其中结构具有第一宽度,将至少一个结构中的碳层的宽度减小到第二宽度,沉积氧化物层以围绕 至少一个结构,去除所述氧化物层和所述掩模的一部分,除去所述碳层以在所述至少一个结构中的每一个结构的氧化物层的剩余部分中形成开口,用导电材料填充所述至少一个开口 并且去除氧化物层的剩余部分和导电层的一部分以形成翅片。

    Method using planarizing gate material to improve gate critical dimension in semiconductor devices
    9.
    发明授权
    Method using planarizing gate material to improve gate critical dimension in semiconductor devices 有权
    使用平面化栅极材料来改善半导体器件中的栅极临界尺寸的方法

    公开(公告)号:US06787439B2

    公开(公告)日:2004-09-07

    申请号:US10290276

    申请日:2002-11-08

    IPC分类号: H01L213205

    摘要: A method of manufacturing a semiconductor device may include forming a fin structure on an insulator. The fin structure may include side surfaces and a top surface. The method may also include depositing a gate material over the fin structure and planarizing the deposited gate material. An antireflective coating may be deposited on the planarized gate material, and a gate structure may be formed out of the planarized gate material using the antireflective coating.

    摘要翻译: 制造半导体器件的方法可以包括在绝缘体上形成翅片结构。 翅片结构可以包括侧表面和顶表面。 该方法还可以包括在鳍结构上沉积栅极材料并平坦化沉积的栅极材料。 可以在平坦化的栅极材料上沉积抗反射涂层,并且可以使用抗反射涂层从平坦化栅极材料形成栅极结构。

    Etch stop layer for etching FinFET gate over a large topography
    10.
    发明授权
    Etch stop layer for etching FinFET gate over a large topography 有权
    蚀刻停止层,用于在大地形上蚀刻FinFET栅极

    公开(公告)号:US06787476B1

    公开(公告)日:2004-09-07

    申请号:US10632989

    申请日:2003-08-04

    IPC分类号: H01L21302

    摘要: A method of forming a gate for a Fin Field Effect Transistor (FinFET) is provided. The method includes forming a first layer of material over a fin and forming a second layer over the first layer. The second layer includes either Ti or TiN. The method further includes forming a third layer over the second layer. The third layer includes an anti-reflective coating. The method also includes etching the first, second and third layers to form the gate for the FinFET.

    摘要翻译: 提供了一种形成Fin场效应晶体管(FinFET)的栅极的方法。 该方法包括在翅片上形成第一层材料,并在第一层上形成第二层。 第二层包括Ti或TiN。 该方法还包括在第二层上形成第三层。 第三层包括抗反射涂层。 该方法还包括蚀刻第一,第二和第三层以形成用于FinFET的栅极。