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12 条记录 (耗时 0.034 秒)

    Direct memory access (DMA) transfer buffer processor
    1.
    发明授权
    Direct memory access (DMA) transfer buffer processor 有权
    直接存储器访问（DMA）传输缓冲处理器

    公开(公告)号：US07159048B2

    公开(公告)日：2007-01-02

    申请号：US10179816

    申请日：2002-06-24

    申请人： Bradley Roach ,  David Duckman ,  Eric Peel ,  Qing Xue

    发明人： Bradley Roach ,  David Duckman ,  Eric Peel ,  Qing Xue

    IPC分类号： G06F13/28

    CPC分类号： G06F13/28

    摘要： A DMA (Direct Memory Access) Exchange Block (DXB) processor may include a receive processor for writing data from a local memory to a host memory over a bus, e.g., a Peripheral Component Interconnect Extended (PCI/X) bus, and a transmit processor for writing data retrieved from the host memory over the bus to the local memory. Each processor may include a high priority queue and a normal priority queue. A controlling program generates DXBs, each of which include a tag assigned by the controlling program and memory descriptors corresponding to a direct memory access operation. The memory descriptor may include a host memory descriptor (address/length) and one or more local memory descriptors. The controlling program writes a DXB to one of the queues in a cache line spill operation. The transfer processor may include two channel registers, enabling the processor to perform two PCI/X data transfers simultaneously.

    摘要翻译： DMA（直接存储器访问）交换块（DXB）处理器可以包括用于通过总线将数据从本地存储器写入主机存储器的接收处理器，例如外围部件互连扩展（PCI / X）总线和传输 处理器，用于将通过总线从主机存储器检索的数据写入本地存储器。 每个处理器可以包括高优先级队列和正常优先级队列。 控制程序生成DXB，每个DXB包括由控制程序分配的标签和对应于直接存储器访问操作的存储器描述符。 存储器描述符可以包括主机存储器描述符（地址/长度）和一个或多个本地存储器描述符。 控制程序将DXB写入高速缓存行溢出操作中的一个队列。 传送处理器可以包括两个通道寄存器，使处理器能够同时执行两个PCI / X数据传输。

    Method for determining valid bytes for multiple-byte burst memories
    2.
    发明授权
    Method for determining valid bytes for multiple-byte burst memories 有权
    用于确定多字节突发存储器的有效字节的方法

    公开(公告)号：US06904505B1

    公开(公告)日：2005-06-07

    申请号：US09687526

    申请日：2000-10-12

    申请人： Eric Peel ,  Bradley Roach ,  Qing Xue

    发明人： Eric Peel ,  Bradley Roach ,  Qing Xue

    IPC分类号： G06F12/02 ,  G06F12/04 ,  G06F12/08 ,  G06F13/28 ,  G06F12/00

    CPC分类号： G06F13/28

    摘要： A memory controller for a multi-byte burst memory device may control access to memory based on parameters set up by a client. These parameters may include a byte address and a byte count that indicates the number of bytes the client is requesting from memory. These values, and an integer representing the number of bytes in a burst-accessed word, may be operated on to produce a word that may be used to identify valid bytes in the burst-accessed word.

    摘要翻译： 用于多字节突发存储器设备的存储器控​​制器可以基于由客户端设置的参数来控制对存储器的访问。 这些参数可以包括一个字节地址和一个字节计数，指示客户端从存储器请求的字节数。 这些值和表示突发访问字中的字节数的整数可以被操作以产生可用于标识突发访问字中的有效字节的字。

    Data formatter for shifting data to correct data lanes
    3.
    发明授权
    Data formatter for shifting data to correct data lanes 有权
    数据格式化程序用于将数据移动到正确的数据通道

    公开(公告)号：US06711494B2

    公开(公告)日：2004-03-23

    申请号：US10000848

    申请日：2001-11-30

    申请人： Eric Peel ,  Bradley Roach ,  Qing Xue

    发明人： Eric Peel ,  Bradley Roach ,  Qing Xue

    IPC分类号： G06F1200

    CPC分类号： G06F5/08 ,  G06F5/10

    摘要： A data formatter includes a shift register and a pointer manager. The shift register receives data from a providing RAM and shifts that data in response to reading data from the providing RAM and writing data to a receiving FIFO. A pointer manager maintains a pointer that points to a first valid byte in a sub-block of data into the correct bytes lanes of the FIFO by moving the pointer as data is shifted into and out of the shift register.

    摘要翻译： 数据格式化器包括移位寄存器和指针管理器。 移位寄存器从提供RAM接收数据，并响应于从提供RAM读取数据并将数据写入接收FIFO而移位该数据。 指针管理器通过在数据被移入和移出移位寄存器时通过移动指针来保持将数据子块中的第一有效字节指向FIFO的正确字节通道的指针。

    Memory data interface
    4.
    发明授权
    Memory data interface 有权
    内存数据接口

    公开(公告)号：US06894935B2

    公开(公告)日：2005-05-17

    申请号：US10440855

    申请日：2003-05-19

    申请人： Eric Peel ,  Qing Xue ,  Sam Su ,  Stephen Eugene Holness

    发明人： Eric Peel ,  Qing Xue ,  Sam Su ,  Stephen Eugene Holness

    IPC分类号： G11C7/10 ,  G11C7/22 ,  G11C16/04

    CPC分类号： G11C7/1006 ,  G11C7/22

    摘要： The present invention is directed to a memory data interface for transferring data between a memory device and an integrated circuit, whereby, in accordance with one aspect of the present invention, the memory data interface includes a data selector for selecting and normalizing data from memory devices operating at different data transfer timing, and, in accordance with another aspect of the present invention, the memory data interface is capable of transferring data between a memory device and an integrated circuit having a different bus width than the memory device. In accordance with yet another aspect of the present invention, the memory data interface is capable of transferring data between an integrated circuit and a variety of different memory device having different data bus widths. Finally, in accordance with yet another aspect of the present invention, the memory data interface is capable of transferring data between an integrated circuit and a variety of memory devices having different bus widths and different data transfer timing.

    摘要翻译： 本发明涉及一种用于在存储器件和集成电路之间传送数据的存储器数据接口，由此根据本发明的一个方面，存储器数据接口包括用于从存储器件中选择和归一化数据的数据选择器 在不同的数据传输定时操作，并且根据本发明的另一方面，存储器数据接口能够在存储器件和具有与存储器件不同的总线宽度的集成电路之间传送数据。 根据本发明的另一方面，存储器数据接口能够在集成电路和具有不同数据总线宽度的各种不同的存储器件之间传送数据。 最后，根据本发明的另一方面，存储器数据接口能够在集成电路和具有不同总线宽度和不同数据传输时序的各种存储器件之间传送数据。

    Spring leaf and overrunning clutch provided with the same
    5.
    发明授权
    Spring leaf and overrunning clutch provided with the same 有权
    弹簧叶和超越离合器提供相同的

    公开(公告)号：US08556052B2

    公开(公告)日：2013-10-15

    申请号：US13147994

    申请日：2009-11-27

    申请人： Xuegang Zhou ,  Qing Xue ,  Jianwei Shi

    发明人： Xuegang Zhou ,  Qing Xue ,  Jianwei Shi

    IPC分类号： F16D15/00

    CPC分类号： F16D41/067

    摘要： A spring leaf and an overrunning clutch provided with the same are provided. The spring leaf is made up of a support strip (3-1), a clamping strip (3-2), and a connection beam (3-3). The support strip (3-1) supports a needle roller in suspension. The connection beam (3-3) connects the support strip (3-1) with the clamping strip (3-2). The main body of the clamping strip (3-2) is a straight strip (3-2-1), either end of which is provided with a V-shaped bended part (3-2-2). The overrunning clutch is provided with a retainer, multiple needle rollers, and multiple spring leaves. Mounting grooves for the spring leaves are respectively disposed at positions, corresponding to each crossbeam, on outer end surfaces of a first and a second annular end edge at both ends of a window hole of the retainer. The bottom of the mounting groove for the spring leaf is V-shaped when cut along an axial direction of the retainer. An inner surface of the straight strip (3-2-1) of the clamping strip (3-2) of the spring leaf is matched with an outer surface of the crossbeam. An inner surface of the V-shaped bended part (3-2-2) of the clamping strip (3-2) is matched with a bottom surface of the mounting groove for the spring leaf. The technical problem of the potential displacement and detachment of the spring leaf during the reciprocation of the existing overrunning clutch at a high rotational speed and high frequency is solved by the invention.

    摘要翻译： 提供了一种设有弹簧叶片和超越离合器的离合器。 弹簧片由支撑条（3-1），夹紧条（3-2）和连接梁（3-3）组成。 支撑条（3-1）支撑悬挂的滚针。 连接梁（3-3）将支撑条（3-1）与夹紧条（3-2）相连。 夹持条（3-2）的主体是直条（3-2-1），其两端都设有V形弯曲部（3-2-2）。 超越离合器设置有保持器，多个滚针和多个弹簧叶片。 弹簧片的安装槽分别设置在与保持器的窗孔两端的第一和第二环形端边缘的外端表面对应的每个横梁对应的位置上。 当沿保持器的轴向方向切割时，用于弹簧叶片的安装槽的底部为V形。 弹簧叶片的夹紧条（3-2）的直条（3-2-1）的内表面与横梁的外表面相匹配。 夹紧条（3-2）的V形弯曲部（3-2-2）的内表面与用于弹簧叶片的安装槽的底面相匹配。 本发明解决了现有超越离合器在高转速和高频率往复运动过程中弹簧叶片位移和脱离的技术问题。

    Old-port node detection and hub port bypass
    6.
    发明授权
    Old-port node detection and hub port bypass 失效

    公开(公告)号：US06496514B2

    公开(公告)日：2002-12-17

    申请号：US09730149

    申请日：2000-12-04

    申请人： Sam Su ,  David Baldwin ,  Qing Xue ,  Hossein Hashemi

    发明人： Sam Su ,  David Baldwin ,  Qing Xue ,  Hossein Hashemi

    IPC分类号： H04L1242

    CPC分类号： H04L12/4625 ,  H04L12/403 ,  H04L12/42

    摘要： A hub port in a Fibre Channel loop for detecting and bypassing attached node ports in an OLD-PORT state is disclosed. The hub port includes a hub data source, a detect circuits, and an output control circuit. The hub data source supplies data to the hub port from a Fibre Channel loop. The detect circuit is configured to detect a valid non-Arbitrated Loop sequence from an attached node port indicating that the node port is in an OLD-PORT state. The output control circuit operates to bypass the node port from the loop when the valid non-Arbitrated Loop sequence is detected.

    Hardware initialization with or without processor intervention
    8.
    发明授权
    Hardware initialization with or without processor intervention 有权
    硬件初始化有或没有处理器干预

    公开(公告)号：US07328334B2

    公开(公告)日：2008-02-05

    申请号：US10856162

    申请日：2004-05-27

    申请人： Sam Su ,  Hossein Hashemi ,  Qing Xue

    发明人： Sam Su ,  Hossein Hashemi ,  Qing Xue

    IPC分类号： G06F15/177

    CPC分类号： G06F9/4403 ,  G06F1/24

    摘要： In an embodiment, an initialization extension device may provide an extended initialization period to enable a processor to configure a device, for example, an application specific integrated circuit (ASIC), prior to entering an operating mode. The device may include a number of control registers that may be configured to default settings in a register initialization period commenced in response to a reset signal. The reset signal may also trigger an extension timer to countdown a timer extended initialization period. During the timer extended initialization period, the processor may write an extension control signal, e.g., an extension bit, to a register. An initialization extension unit may maintain the device in an initialization mode during the timer extended initialization period and/or while the register contains the extension control signal. The processor may configure the control registers for one or more operations the device may perform when it enters the operating mode.

    摘要翻译： 在一个实施例中，初始化扩展设备可以提供扩展的初始化时段，以使处理器在进入操作模式之前配置设备，例如专用集成电路（ASIC）。 该设备可以包括多个控制寄存器，其可以被配置为在响应于复位信号而开始的寄存器初始化时段中的默认设置。 复位信号还可以触发扩展定时器以对定时器延长的初始化周期进行倒计时。 在定时器延长的初始化时段期间，处理器可以将扩展控制信号（例如，扩展位）写入寄存器。 初始化扩展单元可以在定时器扩展初始化周期期间和/或当寄存器包含扩展控制信号时将设备维持在初始化模式。 处理器可以配置控制寄存器用于设备在进入操作模式时可以执行的一个或多个操作。

    SPRING LEAF AND OVERRUNNING CLUTCH PROVIDED WITH THE SAME
    9.
    发明申请
    SPRING LEAF AND OVERRUNNING CLUTCH PROVIDED WITH THE SAME 有权
    弹簧叶和超音速离合器

    公开(公告)号：US20120279817A1

    公开(公告)日：2012-11-08

    申请号：US13147994

    申请日：2009-11-27

    申请人： Xuegang Zhou ,  Qing Xue ,  Jianwei Shi

    发明人： Xuegang Zhou ,  Qing Xue ,  Jianwei Shi

    IPC分类号： F16D41/064

    CPC分类号： F16D41/067

    摘要： A spring leaf and an overrunning clutch provided with the same are provided. The spring leaf is made up of a support strip (3-1), a clamping strip (3-2), and a connection beam (3-3). The support strip (3-1) supports a needle roller in suspension. The connection beam (3-3) connects the support strip (3-1) with the clamping strip (3-2). The main body of the clamping strip (3-2) is a straight strip (3-2-1), either end of which is provided with a V-shaped bended part (3-2-2). The overrunning clutch is provided with a retainer, multiple needle rollers, and multiple spring leaves. Mounting grooves for the spring leaves are respectively disposed at positions, corresponding to each crossbeam, on outer end surfaces of a first and a second annular end edge at both ends of a window hole of the retainer. The bottom of the mounting groove for the spring leaf is V-shaped when cut along an axial direction of the retainer. An inner surface of the straight strip (3-2-1) of the clamping strip (3-2) of the spring leaf is matched with an outer surface of the crossbeam. An inner surface of the V-shaped bended part (3-2-2) of the clamping strip (3-2) is matched with a bottom surface of the mounting groove for the spring leaf. The technical problem of the potential displacement and detachment of the spring leaf during the reciprocation of the existing overrunning clutch at a high rotational speed and high frequency is solved by the invention.

    摘要翻译： 提供了一种设有弹簧叶片和超越离合器的离合器。 弹簧片由支撑条（3-1），夹紧条（3-2）和连接梁（3-3）组成。 支撑条（3-1）支撑悬挂的滚针。 连接梁（3-3）将支撑条（3-1）与夹紧条（3-2）相连。 夹持条（3-2）的主体是直条（3-2-1），其两端都设有V形弯曲部（3-2-2）。 超越离合器设置有保持器，多个滚针和多个弹簧叶片。 弹簧片的安装槽分别设置在与保持器的窗孔两端的第一和第二环形端边缘的外端表面对应的每个横梁对应的位置上。 当沿保持器的轴向方向切割时，用于弹簧叶片的安装槽的底部为V形。 弹簧叶片的夹紧条（3-2）的直条（3-2-1）的内表面与横梁的外表面相匹配。 夹紧条（3-2）的V形弯曲部（3-2-2）的内表面与用于弹簧叶片的安装槽的底面相匹配。 本发明解决了现有超越离合器在高转速和高频率往复运动过程中弹簧叶片位移和脱离的技术问题。

    Extension signal generator coupled to an extension timer and an extension register to generate an initialization extension signal
    10.
    发明授权
    Extension signal generator coupled to an extension timer and an extension register to generate an initialization extension signal 失效
    扩展信号发生器耦合到扩展定时器和扩展寄存器以生成初始化扩展信号

    公开(公告)号：US06772360B2

    公开(公告)日：2004-08-03

    申请号：US09779195

    申请日：2001-02-07

    申请人： Sam Su ,  Hossein Hashemi ,  Qing Xue

    发明人： Sam Su ,  Hossein Hashemi ,  Qing Xue

    IPC分类号： G06F104

    CPC分类号： G06F9/4403 ,  G06F1/24

    摘要： In an embodiment, an initialization extension device may provide an extended initialization period to enable a processor to configure a device, for example, an application specific integrated circuit (ASIC), prior to entering an operating mode. The device may include a number of control registers that may be configured to default settings in a register initialization period commenced in response to a reset signal. The reset signal may also trigger an extension timer to countdown a timer extended initialization period. During the timer extended initialization period, the processor may write an extension control signal, e.g., an extension bit, to a register. An initialization extension unit may maintain the device in an initialization mode during the timer extended initialization period and/or while the register contains the extension control signal. The processor may configure the control registers for one or more operations the device may perform when it enters the operating mode.

    摘要翻译： 在一个实施例中，初始化扩展设备可以提供扩展的初始化时段，以使处理器在进入操作模式之前配置设备，例如专用集成电路（ASIC）。 该设备可以包括多个控制寄存器，其可以被配置为在响应于复位信号而开始的寄存器初始化时段中的默认设置。 复位信号还可以触发扩展定时器以对定时器延长的初始化周期进行倒计时。 在定时器延长的初始化时段期间，处理器可以将扩展控制信号（例如，扩展位）写入寄存器。 初始化扩展单元可以在定时器扩展初始化周期期间和/或当寄存器包含扩展控制信号时将设备维持在初始化模式。 处理器可以配置控制寄存器用于设备在进入操作模式时可以执行的一个或多个操作。