Data processing system having unique microinstruction control and stack
means
    1.
    发明授权
    Data processing system having unique microinstruction control and stack means 失效
    数据处理系统具有独特的微指令控制和堆栈手段

    公开(公告)号:US4939640A

    公开(公告)日:1990-07-03

    申请号:US597195

    申请日:1984-04-05

    IPC分类号: G06F9/22

    CPC分类号: G06F9/223

    摘要: A data processing system which includes a memory and a processor comprising at least two execution units. The system further includes a microcode control unit for storing sequences of microinstructions and an execution microinstruction stack containing at least one stack frame containing the machine state of a first execution unit when the execution of a microinstruction has been interrupted. A memory microinstruction stack is provided to store a plurality of stack frames, stack frames being transferrable between the execution microinstruction stack and the memory microinstructiion stack. The microcode control unit contains sequences of monitor microinstructions and has associated with it a minotor microinstruction stack for storing the machine state of the first execution unit when the execution of a monitor microinstruction has been interrupted. A second execution unit for executing primarily arithmetic microinstructions includes an execution storage unit containing the current machine state of the second execution unit and an arithmetic stack which stores the machine state of the second execution unit when it has executed a previous arithmetic microinstruction. The memory includes a memory arithmetic stack containing further arithmetic stack frames, stack frames being transferrable between the execution storage unit and the memory arithmetic stack. Further an instruction stack is provided for storing the machine state in the processor when execution of a macroinstruction has been interrupted.

    摘要翻译: 一种包括存储器和包括至少两个执行单元的处理器的数据处理系统。 所述系统还包括微代码控制单元,用于存储微指令序列和执行微指令栈,所述执行微指令栈包含至少一个堆栈帧,所述至少一个堆栈帧在微指令的执行已中断时包含第一执行单元的机器状态。 提供存储器微指令堆栈以存储多个堆栈帧,堆栈帧可在可执行微指令栈和存储器微指令栈之间传送。 微代码控制单元包含监视器微指令的序列,并且与监视器微指令相关联,当监视器微指令的执行已被中断时,用于存储第一执行单元的机器状态的微运动微指令堆栈。 用于主要执行算术微指令的第二执行单元包括执行存储单元,其包含第二执行单元的当前机器状态,以及算术堆栈,当执行了先前的算术微指令时,存储第二执行单元的机器状态。 存储器包括存储器运算堆栈,其包含进一步的算术堆栈帧,堆栈帧可在执行存储单元和存储器运算堆栈之间传输。 此外,提供了用于在执行宏指令已被中断时将处理器状态存储在处理器中的指令堆栈。

    Digital data processing system using unique ALU register files and
micro-instruction stacks

    公开(公告)号:US4480306A

    公开(公告)日:1984-10-30

    申请号:US266425

    申请日:1981-05-22

    IPC分类号: G06F9/26 G06F9/22

    CPC分类号: G06F9/26

    摘要: A data processing system having a flexible internal structure, protected from and effectively invisible to users, with multilevel control and stack mechanisms and capability of performing multiple, concurrent operations, and providing a flexible, simplified interface to users. The system is internally comprised of a plurality of separate, independent processors, each having a separate microinstruction control and at least one separate, independent port to a central communications and memory node. The communications and memory node is an independent processor having separate, independent microinstruction control and comprised of a plurality of independently operating, microinstruction controlled processors capable of performing multiple, concurrent memory and communications operations. Addressing mechanisms allow permanent, unique identification of information as objects and an extremely large address space accessible and common to all such systems. Addresses are independent of system physical configuration and, as particularly described with reference to the invention herein, identify locations of object information to be accessed by utlizing address formats which comprise an object field, offset field and a length field so that information can be identified to bit granular level and to information type and format. Arithmetic logic unit (ALU) means, also as particularly described with reference to the invention herein, include general register means having three vertically oriented parts for storing such respective fields. Such ALU means further include an ALU microinstruction stack means having at least one microinstruction stack frame for storing the state of execution of a microinstruction. A memory microinstruction stack is provided to store a plurality of microinstruction stack frames so that microinstruction stack frames can be transferred between the ALU and the memory microinstruction stacks. Protection mechanisms provide variable access rights associated with individual bodies of information. User language instructions are transformed into dialect coded, uniform, intermediate level instructions to provide equal facility of execution for all user languages. Operands are referred to by uniform format names which are transformed, by internal mechanisms transparent to users, into addresses.

    Digital data processing system
    10.
    发明授权
    Digital data processing system 失效
    数字数据处理系统

    公开(公告)号:US4493024A

    公开(公告)日:1985-01-08

    申请号:US266406

    申请日:1981-05-22

    IPC分类号: G06F9/318 G06F9/35 G06F13/00

    CPC分类号: G06F9/30192 G06F9/35

    摘要: A data processing system having a flexible internal structure, protected from and effecitvely invisible to users, with multilevel control and stack mechanisms and capability of performing multiple, concurrent operations, and providing a flexible, simplified interface to users. The system is internally comprised of a plurality of separate, independent processors, each having a separate microinstruction control and at least one separate, independent port to a central communications and memory node. The communications and memory node is an independent processor having separate, independent microinstruction control and comprised of a plurality of independently operating, microinstruction controlled processors capable of performing multiple, concurrent memory and communications operations. Addressing mechanisms allow permanent, unique identification of information and an extremely large address space accessible and common to all such systems. Addresses are independent of system physical configuration. Information is identified to bit granular level and to information type and format. Protection mechanisms provide variable access rights associated with individual bodies of information. User language instructions are transformed into dialect coded, uniform, intermediate level instructions to provide equal facility of execution for all user languages. Operands are referred to by uniform format names which are transformed, by internal mechanisms transparent to users, into addresses.

    摘要翻译: 具有灵活的内部结构的数据处理系统,具有多层次的控制和堆栈机制以及执行多个并发操作的能力,并为用户提供灵活,简化的界面,保护用户不受任何用户无害的影响。 该系统内部由多个独立的独立处理器组成,每个独立的处理器具有单独的微指令控制和至少一个独立于中央通信和存储器节点的独立端口。 通信和存储器节点是具有独立且独立的微指令控制的独立处理器,并且包括能够执行多个并发存储器和通信操作的多个独立操作的微指令控制的处理器。 寻址机制允许永久,唯一的信息识别和所有这些系统可访问和共同的极大的地址空间。 地址与系统物理配置无关。 信息被识别为细粒度级别和信息类型和格式。 保护机制提供与个体信息相关联的可变访问权限。 用户语言指令被转换为方言编码的,统一的中间级指令,以便为所有用户语言提供相同的执行功能。 操作数由统一格式名称引用,通过对用户透明的内部机制转换为地址。