公开(公告)号：US07394869B2

公开(公告)日：2008-07-01

申请号：US10816731

申请日：2004-04-02

申请人： Henrik T. Jensen ,  Brima B. Ibrahim

发明人： Henrik T. Jensen ,  Brima B. Ibrahim

IPC分类号： H03C3/00

CPC分类号： H04L27/0008 ,  H04L1/0003 ,  H04L1/0025

摘要： The present invention provides a radio transmitter having a digital modulator that further includes logic for continuous amplitude and continuous phase modulation switching in an RF transmitter intended to support both frequency shift keying (FSK) and phase shift keying (PSK) modulation techniques in a smooth and continuous manner that does not violate spectral mask requirements. The invention supports continuous modulation switching both ways, i.e., from FSK to PSK and from PSK to FSK. In operation, the radio transmitter initially operates in a first communication mode, transmitting communication signals to a remote agent according to a first modulation technique at a first data rate and then transitions to the second modulation type at a second data rate without spectral mask violation.

摘要翻译： 本发明提供了一种具有数字调制器的无线电发射机，该数字调制器还包括用于RF发射机中的连续振幅和连续相位调制切换的逻辑，其旨在支持频移键控（FSK）和相移键控（PSK）调制技术， 连续的方式，不违反光谱掩模要求。 本发明支持连续调制方式两种方式，即从FSK到PSK，从PSK到FSK。 在操作中，无线电发射机最初以第一通信模式操作，根据第一数据速率的第一调制技术向远程代理发送通信信号，然后以没有频谱掩模违例的第二数据速率转换到第二调制类型。

公开(公告)号：US07940142B2

公开(公告)日：2011-05-10

申请号：US12506997

申请日：2009-07-21

申请人： Henrik T. Jensen ,  Brima B. Ibrahim

发明人： Henrik T. Jensen ,  Brima B. Ibrahim

IPC分类号： H03C3/20 ,  H03C3/06

CPC分类号： H03L7/1976 ,  H03C3/0925 ,  H03C3/0933 ,  H03C3/0941 ,  H03C3/095 ,  H03C3/0991 ,  H03L7/093

摘要： A polar transmitter includes a two-point modulation phase-locked loop (PLL) for producing an RF signal with a wide bandwidth. The PLL includes a first input for receiving a phase signal of a variable-envelope modulated signal and providing the phase signal along a first signal path to produce a first frequency modulation signal and a second input for receiving the phase signal and providing the phase signal along a second signal path to produce a second frequency modulation signal. The PLL further includes a voltage controlled oscillator (VCO) having two modulation points, one for receiving the first frequency modulation signal and the other for receiving the second frequency modulation signal. The VCO is controlled by an aggregate of the first frequency modulation signal and the second frequency modulation signal to up-convert the phase signal from an IF to an RF to produce the RF signal with a wide bandwidth.

摘要翻译： 极性发射机包括用于产生宽带宽的RF信号的两点调制锁相环（PLL）。 PLL包括用于接收可变包络调制信号的相位信号并沿着第一信号路径提供相位信号以产生第一频率调制信号的第一输入端和用于接收相位信号并提供相位信号的第二输入端 用于产生第二频率调制信号的第二信号路径。 PLL还包括具有两个调制点的压控振荡器（VCO），一个用于接收第一频率调制信号，另一个用于接收第二频率调制信号。 VCO由第一频率调制信号和第二频率调制信号的集合控制，以将来自IF的相位信号上变频到RF以产生具有宽带宽的RF信号。

公开(公告)号：US07579922B2

公开(公告)日：2009-08-25

申请号：US11471147

申请日：2006-06-20

申请人： Henrik T. Jensen ,  Brima B. Ibrahim

发明人： Henrik T. Jensen ,  Brima B. Ibrahim

IPC分类号： H03C3/09

CPC分类号： H03L7/1976 ,  H03C3/0925 ,  H03C3/0933 ,  H03C3/0941 ,  H03C3/095 ,  H03C3/0991 ,  H03L7/093

摘要： A polar transmitter includes a two-point modulation phase-locked loop (PLL) for producing an RF signal with a wide bandwidth. The PLL includes a first input for receiving a phase signal of a variable-envelope modulated signal and providing the phase signal along a first signal path to produce a first frequency modulation signal and a second input for receiving the phase signal and providing the phase signal along a second signal path to produce a second frequency modulation signal. The PLL further includes a voltage controlled oscillator (VCO) having two modulation points, one for receiving the first frequency modulation signal and the other for receiving the second frequency modulation signal. The VCO is controlled by an aggregate of the first frequency modulation signal and the second frequency modulation signal to up-convert the phase signal from an IF to an RF to produce the RF signal with a wide bandwidth.

公开(公告)号：US07215703B2

公开(公告)日：2007-05-08

申请号：US10367492

申请日：2003-02-14

申请人： Henrik T. Jensen ,  Brima B. Ibrahim

发明人： Henrik T. Jensen ,  Brima B. Ibrahim

IPC分类号： H04B17/00

CPC分类号： H04B17/318 ,  H04B17/21

摘要： Digital calculation of an RSSI value begins by digitally calculating a magnitude of a signal (e.g., a received RF signal or representation thereof). The process then continues by filtering the magnitude of the signal to produce a filtered magnitude signal. The process then continues by determining a coarse RSSI value of the filtered magnitude signal, wherein the coarse RSSI value indicates a sliding window of RSSI values. Once the coarse RSSI value is obtained, the process continues by determining a fine RSSI value within the sliding window of RSSI values. The process concludes by summing the fine RSSI value with the coarse RSSI value to produce a digital RSSI value.

摘要翻译： 通过数字计算信号的幅度（例如，接收的RF信号或其表示）开始RSSI值的数字计算。 然后，该过程通过对信号的幅度进行滤波来继续以产生经滤波的幅度信号。 然后，该过程通过确定滤波的幅度信号的粗略RSSI值继续，其中粗略RSSI值表示RSSI值的滑动窗口。 一旦获得了粗糙的RSSI值，则通过确定RSSI值的滑动窗口内的精细RSSI值来继续该过程。 该过程通过将精细RSSI值与粗RSSI值相加来产生数字RSSI值。

公开(公告)号：US08296346B2

公开(公告)日：2012-10-23

申请号：US12690532

申请日：2010-01-20

申请人： Henrik T. Jensen ,  Brima B. Ibrahim

发明人： Henrik T. Jensen ,  Brima B. Ibrahim

IPC分类号： G06F17/17 ,  G06F17/10

CPC分类号： H04L27/38 ,  H03H17/0664 ,  H03H17/0671

摘要： A channel-select decimation filter capable of operating in multiple bandwidth modes includes a first low pass filter stage, a variable gain stage, a subtraction module a second low pass filter stage and a down-sampling module. The first low pass filter stage includes a first programmable delay module for filtering input signals to produce first low pass filtered signals. The variable gain stage applies a programmable gain to the input signals to produce gained input signals. The subtraction module subtracts the first low pass filtered signals from the gain input signals to produce first stage signals. The second low pass filter stage includes a second programmable delay module for filtering the first stage signals to produce channel-selected signals. The first programmable delay module, second programmable delay module and programmable gain are programmed to implement one of the multiple bandwidth modes.

摘要翻译： 能够在多个带宽模式下工作的频道选择抽取滤波器包括第一低通滤波器级，可变增益级，减法模块，第二低通滤波级和下采样模块。 第一低通滤波器级包括用于滤波输入信号以产生第一低通滤波信号的第一可编程延迟模块。 可变增益级将可编程增益应用于输入信号以产生增益的输入信号。 减法模块从增益输入信号中减去第一低通滤波信号，以产生第一级信号。 第二低通滤波器级包括用于对第一级信号进行滤波以产生通道选择信号的第二可编程延迟模块。 第一可编程延迟模块，第二可编程延迟模块和可编程增益被编程以实现多种带宽模式之一。

公开(公告)号：US20100120387A1

公开(公告)日：2010-05-13

申请号：US12690532

申请日：2010-01-20

申请人： Henrik T. Jensen ,  Brima B. Ibrahim

发明人： Henrik T. Jensen ,  Brima B. Ibrahim

IPC分类号： H04B1/16 ,  H03H7/00 ,  H04B1/18

CPC分类号： H04L27/38 ,  H03H17/0664 ,  H03H17/0671

摘要： A channel-select decimation filter capable of operating in multiple bandwidth modes includes a first low pass filter stage, a variable gain stage, a subtraction module a second low pass filter stage and a down-sampling module. The first low pass filter stage includes a first programmable delay module for filtering input signals to produce first low pass filtered signals. The variable gain stage applies a programmable gain to the input signals to produce gained input signals. The subtraction module subtracts the first low pass filtered signals from the gain input signals to produce first stage signals. The second low pass filter stage includes a second programmable delay module for filtering the first stage signals to produce channel-selected signals. The first programmable delay module, second programmable delay module and programmable gain are programmed to implement one of the multiple bandwidth modes.

摘要翻译： 能够在多个带宽模式下工作的频道选择抽取滤波器包括第一低通滤波器级，可变增益级，减法模块，第二低通滤波级和下采样模块。 第一低通滤波器级包括用于滤波输入信号以产生第一低通滤波信号的第一可编程延迟模块。 可变增益级将可编程增益应用于输入信号以产生增益的输入信号。 减法模块从增益输入信号中减去第一低通滤波信号，以产生第一级信号。 第二低通滤波器级包括用于对第一级信号进行滤波以产生通道选择信号的第二可编程延迟模块。 第一可编程延迟模块，第二可编程延迟模块和可编程增益被编程以实现多种带宽模式之一。

公开(公告)号：US07685217B2

公开(公告)日：2010-03-23

申请号：US11189910

申请日：2005-07-26

申请人： Henrik T. Jensen ,  Brima B. Ibrahim

发明人： Henrik T. Jensen ,  Brima B. Ibrahim

IPC分类号： G06F17/10 ,  G06F17/17 ,  H03K9/00

CPC分类号： H04L27/38 ,  H03H17/0664 ,  H03H17/0671

摘要： A channel-select decimation filter capable of operating in multiple bandwidth modes includes a first low pass filter stage, a variable gain stage, a subtraction module a second low pass filter stage and a down-sampling module. The first low pass filter stage includes a first programmable delay module for filtering input signals to produce first low pass filtered signals. The variable gain stage applies a programmable gain to the input signals to produce gained input signals. The subtraction module subtracts the first low pass filtered signals from the gain input signals to produce first stage signals. The second low pass filter stage includes a second programmable delay module for filtering the first stage signals to produce channel-selected signals. The first programmable delay module, second programmable delay module and programmable gain are programmed to implement one of the multiple bandwidth modes.

摘要翻译： 能够在多个带宽模式下工作的频道选择抽取滤波器包括第一低通滤波器级，可变增益级，减法模块，第二低通滤波级和下采样模块。 第一低通滤波器级包括用于滤波输入信号以产生第一低通滤波信号的第一可编程延迟模块。 可变增益级将可编程增益应用于输入信号以产生增益的输入信号。 减法模块从增益输入信号中减去第一低通滤波信号，以产生第一级信号。 第二低通滤波器级包括用于对第一级信号进行滤波以产生通道选择信号的第二可编程延迟模块。 第一可编程延迟模块，第二可编程延迟模块和可编程增益被编程为实现多种带宽模式之一。

公开(公告)号：US20090278613A1

公开(公告)日：2009-11-12

申请号：US12506997

申请日：2009-07-21

申请人： Henrik T. Jensen ,  Brima B. Ibrahim

发明人： Henrik T. Jensen ,  Brima B. Ibrahim

IPC分类号： H03L7/00

CPC分类号： H03L7/1976 ,  H03C3/0925 ,  H03C3/0933 ,  H03C3/0941 ,  H03C3/095 ,  H03C3/0991 ,  H03L7/093

摘要： A polar transmitter includes a two-point modulation phase-locked loop (PLL) for producing an RF signal with a wide bandwidth. The PLL includes a first input for receiving a phase signal of a variable-envelope modulated signal and providing the phase signal along a first signal path to produce a first frequency modulation signal and a second input for receiving the phase signal and providing the phase signal along a second signal path to produce a second frequency modulation signal. The PLL further includes a voltage controlled oscillator (VCO) having two modulation points, one for receiving the first frequency modulation signal and the other for receiving the second frequency modulation signal. The VCO is controlled by an aggregate of the first frequency modulation signal and the second frequency modulation signal to up-convert the phase signal from an IF to an RF to produce the RF signal with a wide bandwidth.

摘要翻译： 极性发射机包括用于产生宽带宽的RF信号的两点调制锁相环（PLL）。 PLL包括用于接收可变包络调制信号的相位信号并沿着第一信号路径提供相位信号以产生第一频率调制信号的第一输入端和用于接收相位信号并提供相位信号的第二输入端 用于产生第二频率调制信号的第二信号路径。 PLL还包括具有两个调制点的压控振荡器（VCO），一个用于接收第一频率调制信号，另一个用于接收第二频率调制信号。 VCO由第一频率调制信号和第二频率调制信号的集合控制，以将来自IF的相位信号上变频到RF以产生具有宽带宽的RF信号。

公开(公告)号：US07580483B2

公开(公告)日：2009-08-25

申请号：US11516413

申请日：2006-09-05

申请人： Brima B. Ibrahim ,  Henrik T. Jensen

发明人： Brima B. Ibrahim ,  Henrik T. Jensen

IPC分类号： H04L27/14 ,  H04L27/16 ,  H04L27/22

CPC分类号： H04L25/061 ,  H04L25/063 ,  H04L27/0014 ,  H04L2027/003 ,  H04L2027/0053 ,  H04L2027/0065

摘要： A method and apparatus for trimming of a local oscillation within a radio frequency integrated circuit (RFIC) includes processing that begins when an RFIC receives a radio frequency (RF) signal having a known frequency. The processing then continues when the RFIC mixes the RF signal with a receiver local oscillation to produce a low intermediate frequency (IF) signal, which may have a carrier frequency of zero (i.e., a baseband signal) or up to a few mega Hertz). The processing then continues when the RFIC demodulates the low IF signal to produce demodulated data. The processing then continues as the RFIC determines a DC offset from the demodulated data, where the DC offset is reflective of the difference between the known frequency and the frequency of the receiver local oscillation. The processing then continues as the RFIC adjusts the receiver local oscillation to reduce the DC offset when the DC offset compares unfavorably with an allowable offset threshold.

摘要翻译： 一种在射频集成电路（RFIC）内修整本地振荡的方法和装置包括当RFIC接收具有已知频率的射频（RF）信号时开始的处理。 然后，当RFIC将RF信号与接收机本地振荡混合以产生可能具有零载波频率（即，基带信号）或高达几兆赫兹的低中频（IF）信号时，处理继续进行。 。 然后，当RFIC解调低IF信号以产生解调数据时，处理继续。 然后，处理继续，因为RFIC从解调数据确定DC偏移，其中DC偏移反映了已知频率和接收机本地振荡的频率之间的差异。 然后，随着RFIC调整接收机本地振荡，当DC偏移与允许的偏移阈值不利地相比较时，该处理继续减小直流偏移。

公开(公告)号：US20080007346A1

公开(公告)日：2008-01-10

申请号：US11471147

申请日：2006-06-20

申请人： Henrik T. Jensen ,  Brima B. Ibrahim

发明人： Henrik T. Jensen ,  Brima B. Ibrahim

IPC分类号： H03L7/00

CPC分类号： H03L7/1976 ,  H03C3/0925 ,  H03C3/0933 ,  H03C3/0941 ,  H03C3/095 ,  H03C3/0991 ,  H03L7/093

摘要： A polar transmitter includes a two-point modulation phase-locked loop (PLL) for producing an RF signal with a wide bandwidth. The PLL includes a first input for receiving a phase signal of a variable-envelope modulated signal and providing the phase signal along a first signal path to produce a first frequency modulation signal and a second input for receiving the phase signal and providing the phase signal along a second signal path to produce a second frequency modulation signal. The PLL further includes a voltage controlled oscillator (VCO) having two modulation points, one for receiving the first frequency modulation signal and the other for receiving the second frequency modulation signal. The VCO is controlled by an aggregate of the first frequency modulation signal and the second frequency modulation signal to up-convert the phase signal from an IF to an RF to produce the RF signal with a wide bandwidth.

摘要翻译： 极性发射机包括用于产生宽带宽的RF信号的两点调制锁相环（PLL）。 PLL包括用于接收可变包络调制信号的相位信号并沿着第一信号路径提供相位信号以产生第一频率调制信号的第一输入端和用于接收相位信号并提供相位信号的第二输入端 用于产生第二频率调制信号的第二信号路径。 PLL还包括具有两个调制点的压控振荡器（VCO），一个用于接收第一频率调制信号，另一个用于接收第二频率调制信号。 VCO由第一频率调制信号和第二频率调制信号的集合控制，以将来自IF的相位信号上变频到RF以产生具有宽带宽的RF信号。