摘要:
In accordance with the invention, there are methods for making and there is an integrated circuit comprising a semiconductor substrate comprising device elements and a metallization layer interconnecting the device elements and having an uppermost layer. The integrated circuit can also include a protective overcoat formed over the metallization layer, the protective overcoat having a plurality of patterned regions that expose portions of the metallization layer, a first conductive layer formed on the protective overcoat, and a dielectric layer formed over the first conductive layer. The integrated circuit can further include a second conductive layer formed over the dielectric layer and a plurality of sidewall spacers contacting end portions of the first conductive layer.
摘要:
The present invention provides, in one aspect, a method of fabricating a capacitor 615, comprising forming a first electrode 610, placing a dielectric 515 over the first electrode, and locating a second electrode 510 over the dielectric wherein at least one of the first or second electrodes 610, 510 is doped amorphous silicon.
摘要:
In a disclosed embodiment, a stacked capacitor (100) has bottom, middle and top metal electrode layers (141A, 141B, 141C) interleaved with dielectric layers (142A, 142B) conformally disposed within holes (140A, 140B, 140C) in a protective overcoat or backend dielectric layer (110) over a top metal layer (115) of an integrated circuit (105). A top electrode (155) contacts the top metal electrode layer (141C). A bottom electrode (150) electrically couples an isolated part of the top metal electrode layer (141C) through a bottom electrode via (165A) to a first contact node (135A) in the top metal layer (115) which is in contact with the bottom metal electrode layer (141A). A middle electrode (160) electrically couples a part of the middle metal electrode layer (141B) not covered by the top metal layer (115) through a middle electrode via (165B) to a second contact node (135B) in the top metal electrode layer (115). The sidewalls of the top and middle electrode vias (165A, 165B) are lined with insulating material to electrically isolate the metal electrode layer ends.
摘要:
In a disclosed embodiment, a stacked capacitor (100) has bottom, middle and top metal electrode layers (141A, 141B, 141C) interleaved with dielectric layers (142A, 142B) conformally disposed within holes (140A, 140B, 140C) in a protective overcoat or backend dielectric layer (110) over a top metal layer (115) of an integrated circuit (105). A top electrode (155) contacts the top metal electrode layer (141C). A bottom electrode (150) electrically couples an isolated part of the top metal electrode layer (141C) through a bottom electrode via (165A) to a first contact node (135A) in the top metal layer (115) which is in contact with the bottom metal electrode layer (141A). A middle electrode (160) electrically couples a part of the middle metal electrode layer (141B) not covered by the top metal layer (115) through a middle electrode via (165B) to a second contact node (135B) in the top metal electrode layer (115). The sidewalls of the top and middle electrode vias (165A, 165B) are lined with insulating material to electrically isolate the metal electrode layer ends.
摘要:
An embodiment generally relates a method of forming capacitors. The method includes forming a plurality of holes within a protective overcoat or backend dielectric layer of an integrated circuit and depositing multiple layers of metal, each layer of metal electrically tied to an associated electrode. The method also includes alternately depositing multiple layers of dielectric between the multiple layers of metal and coupling a bottom layer of the multiple layers of metal to a contact node in a top metal layer of the integrated circuit.
摘要:
An embodiment generally relates a method of forming capacitors. The method includes forming a plurality of holes within a protective overcoat or backend dielectric layer of an integrated circuit and depositing multiple layers of metal, each layer of metal electrically tied to an associated electrode. The method also includes alternately depositing multiple layers of dielectric between the multiple layers of metal and coupling a bottom layer of the multiple layers of metal to a contact node in a top metal layer of the integrated circuit.
摘要:
An antifuse (42) is formed by forming a layer of titanium tungsten (34) overlying a portion of a first metal layer (28). The titanium tungsten layer (34) is oxidized to form a film of oxide (36) on its surface. Insulating regions (30) are formed adjacent the titanium tungsten layer (34) and overlying the first metal layer (28). A second metal layer (40) is formed overlying the titanium tungsten layer (34). Applying a break down voltage across the first and second metal layers (28), (40) will break down the oxide film (36), thereby causing a connection between the first and second metal layers (28), (40).
摘要:
A method and system for using a tracking ID to facilitate the refunding of unused postage is provided. Information for a postage transaction, along with the tracking ID and an associated delivery status, is stored. This delivery status is updated when the mail piece carrying the tracking ID is delivered. Unused postage can be confirmed by retrieving the stored postage transaction information and determining from that whether there are duplicative postage transactions. The delivery statuses for the duplicative postage transactions can then be reviewed to determine whether the mail pieces associated with these postage transactions have been delivered. If not, one of the postage transactions may be refunded.
摘要:
A method and system for using an indexing identifier (such as, e.g., a tracking ID or the combination of a postage vendor ID, user account, and piece count) to decrease the size of the postage indicium transmitted to an end user computer, or eliminate transmission of the postage indicium altogether, is provided. When the postage indicium for the end user computer is generated, it is stored, and the indexing identifier, rather than the postage indicium, is transmitted to the end user computer. The indexing identifier is applied to a mail piece, which is then scanned by the postal authority. The postal authority can obtain the stored postage indicium by reference to the indexing identifier. In this manner, the postal authority has access to the postage indicium without having to apply it to the mail piece. The indexing identifiers can optionally be used to index sender identification information for verifying that the sender of a mail piece is a trusted individual or entity.
摘要:
In a high heel shoe the heel seat is angled upwards approximately 3-5 degrees. The insole follows the natural shape of the inside long arch of the foot so that the medial arch of the foot is raised higher than the lateral arch of the foot in order to support the natural angle of the calcaneus, the navicular, the medial cuneiform and the first metatarsal. The angle of the heel seat is more acute relative to the ground looking from the lateral side of the shoe. A triangular dome bump on the insole of the shoe has one corner behind the second metatarsal head, a second corner behind the fourth metatarsal head and the final corner near mid-foot. Material is added beneath the sole of the insole so that the greatest thickness is beneath the metatarsal heads and tapers to zero at the end of the insole toward the toes.