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    Adaptive pulse width control power conversation method and device thereof
    4.
    发明授权
    Adaptive pulse width control power conversation method and device thereof 有权
    自适应脉宽控制电源通话方法及其装置

    公开(公告)号：US08274270B2

    公开(公告)日：2012-09-25

    申请号：US12458570

    申请日：2009-07-16

    申请人： Shun-An Hsieh ,  Yu-Shen Lin

    发明人： Shun-An Hsieh ,  Yu-Shen Lin

    IPC分类号： G05F1/56 ,  G05F1/565 ,  G05F1/569 ,  G05F1/575

    CPC分类号： H03K7/08

    摘要： An adaptive pulse width control power conversion device includes a pulse width adjustable pulse frequency module (PFM) control circuit, a pulse width modulation (PWM) control circuit, a PWM/PFM switching unit, a switching circuit, and a load status detection circuit. When the power conversion device is to be switched from a PWM mode to a PFM mode, pulse width of a series of PFM control signals is sequentially adjusted from a low value to a high value according to a predetermined pulse width increment until an optimum pulse width is determined and thereafter, an output voltage is supplied to a load in the PFM mode, whereby ripple of output voltage in the PFM mode can be improved and improved stability of output of the power conversion device is realized.

    摘要翻译： 一种自适应脉宽控制电源转换装置，包括脉冲宽度可调脉冲频率模块（PFM）控制电路，脉宽调制（PWM）控制电路，PWM / PFM切换单元，开关电路和负载状态检测电路。 当将功率转换装置从PWM模式切换到PFM模式时，一系列PFM控制信号的脉冲宽度根据预定的脉冲宽度增量从低值依次调整为高值，直到最佳脉冲宽度 然后在PFM模式中向负载提供输出电压，从而可以提高PFM模式中的输出电压的波动，并且实现电力转换装置的输出的稳定性的提高。

    Speaker
    6.
    外观设计
    Speaker 有权

    公开(公告)号：USD606043S1

    公开(公告)日：2009-12-15

    申请号：US29311434

    申请日：2009-03-16

    申请人： Yu-Shen Lin

    设计人： Yu-Shen Lin

    MEMORY ARRAY WITH FAST BIT LINE PRECHARGE
    7.
    发明申请
    MEMORY ARRAY WITH FAST BIT LINE PRECHARGE 有权
    存储器阵列与快速位线预置

    公开(公告)号：US20060120175A1

    公开(公告)日：2006-06-08

    申请号：US11004148

    申请日：2004-12-03

    申请人： Sheree Chou ,  Yung-Feng Lin ,  Yu-Shen Lin

    发明人： Sheree Chou ,  Yung-Feng Lin ,  Yu-Shen Lin

    IPC分类号： G11C7/10

    CPC分类号： G11C16/26 ,  G11C7/12

    摘要： An integrated circuit memory array with an extra column of memory cells and a reference bit line is provided, in which the reference bit line acts as a reference for a shared precharging and clamping control on the bit lines in the array. Precharge transistors are coupled to respective bit lines in the array, and adapted to precharge voltage on the respective bit lines to near a target level. A detector has an input coupled to the reference bit line and an output coupled to the precharge transistors on the plurality of bit lines. The detector generates a precharge signal which turns off the precharge transistors when the reference bit line has a voltage near the target level, and turns on the precharge transistors when the reference bit line has a voltage below the target level.

    摘要翻译： 提供具有额外的存储单元列和参考位线的集成电路存储器阵列，其中参考位线用作用于阵列中的位线的共享预充电和钳位控制的参考。 预充电晶体管耦合到阵列中的相应位线，并且适于将各个位线上的电压预充电到接近目标电平。 检测器具有耦合到参考位线的输入端和耦合到多个位线上的预充电晶体管的输出。 当参考位线具有接近目标电平的电压时，检测器产生预充电晶体管，当基准位线具有低于目标电平的电压时，该预充电信号导通预充电晶体管。

    MEMORY ARRAY WITH LOW POWER BIT LINE PRECHARGE
    8.
    发明申请
    MEMORY ARRAY WITH LOW POWER BIT LINE PRECHARGE 有权
    低功率位线前置存储器阵列

    公开(公告)号：US20060120174A1

    公开(公告)日：2006-06-08

    申请号：US11003092

    申请日：2004-12-03

    申请人： Sheree Chou ,  Lung-Yi Chueh ,  Yu-Shen Lin

    发明人： Sheree Chou ,  Lung-Yi Chueh ,  Yu-Shen Lin

    IPC分类号： G11C7/10

    CPC分类号： G11C7/12 ,  G11C16/24

    摘要： An integrated circuit memory array with an extra column of memory cells and a reference bit line is provided, in which the reference bit line acts as a reference for a shared precharging and clamping control on the bit lines in the array. Clamp transistors are coupled to respective bit lines in the array, and adapted to prevent voltage on the respective bit lines from exceeding a target level. A comparator has an input coupled to the reference bit line and an output coupled to the clamp transistors on the plurality of bit lines. The comparator generates a bias voltage which turns on the clamp transistors at a first bias level when the reference bit line has a voltage below the target level, and a second bias level, which is lower than the first bias level, when the reference bit line has a voltage near the target level.

    摘要翻译： 提供具有额外的存储单元列和参考位线的集成电路存储器阵列，其中参考位线用作用于阵列中的位线的共享预充电和钳位控制的参考。 夹持晶体管耦合到阵列中的相应位线，并且适于防止相应位线上的电压超过目标电平。 比较器具有耦合到参考位线的输入端和耦合到多个位线上的钳位晶体管的输出。 比较器产生偏置电压，当参考位线具有低于目标电平的电压时，将钳位晶体管导通到第一偏置电平，并且当参考位线 具有接近目标水平的电压。

    Voltage-boosting generator for reducing effects due to operating voltage variation and temperature change
    9.
    发明授权
    Voltage-boosting generator for reducing effects due to operating voltage variation and temperature change 有权
    电压升压发生器，用于减少由于工作电压变化和温度变化引起的影响

    公开(公告)号：US06580287B2

    公开(公告)日：2003-06-17

    申请号：US10099806

    申请日：2002-03-13

    申请人： Hsien-Wen Hsu ,  Yu-Shen Lin ,  Chun-Hsiung Hung ,  Ho-Chun Liou

    发明人： Hsien-Wen Hsu ,  Yu-Shen Lin ,  Chun-Hsiung Hung ,  Ho-Chun Liou

    IPC分类号： H03K19003

    CPC分类号： H02M3/07

    摘要： A voltage-boosting generator for reducing the effects due to operating voltage variation and temperature change. The generator comprises a delay line circuit and a voltage boosting circuit. The delay line circuit is used to perform a time delay according to an initial boosting signal and to produce a control signal. The voltage boosting circuit is used to boosted voltage according to the control signal.

    摘要翻译： 一种电压升压发生器，用于降低由于工作电压变化和温度变化引起的影响。 发电机包括延迟线电路和升压电路。 延迟线电路用于根据初始升压信号执行时间延迟并产生控制信号。 升压电路根据控制信号用于升压。

    Idiot-proof lock device that prevents a user from changing the code freely and unintentionally
    10.
    发明授权
    Idiot-proof lock device that prevents a user from changing the code freely and unintentionally 有权
    防眩光锁定装置，防止用户自由和无意地更改代码

    公开(公告)号：US08297087B1

    公开(公告)日：2012-10-30

    申请号：US13271286

    申请日：2011-10-12

    申请人： Yu-Shen Lin

    发明人： Yu-Shen Lin

    IPC分类号： E05B37/02

    CPC分类号： E05B37/025 ,  E05B37/0058 ,  E05B67/003 ,  Y10T70/426 ,  Y10T70/435 ,  Y10T70/726 ,  Y10T70/7305 ,  Y10T70/7333 ,  Y10T70/7339

    摘要： A lock device includes a locking unit, a connecting unit, and a latch. The locking unit includes a shank, a rotation knob, a control wheel, a plurality of number wheels, a plurality of locating pieces, and a plurality of snap-fit members. The shank has a first positioning hole. The rotation knob has a second positioning hole combined with the first positioning hole of the shank by a positioning member. Thus, the user has to detach the positioning member from the first positioning hole of the shank to release the rotation knob so as to rotate the rotation knob for changing the code of the number wheels, thereby preventing the user from changing the code of the number wheels freely when rotating the rotation knob unintentionally.

    摘要翻译： 锁定装置包括锁定单元，连接单元和闩锁。 锁定单元包括柄，旋钮，控制轮，多个数字轮，多个定位件和多个卡扣配合构件。 柄具有第一定位孔。 旋转旋钮具有通过定位构件与柄的第一定位孔组合的第二定位孔。 因此，用户必须将定位构件从柄的第一定位孔分离，以释放旋钮，以便旋转旋钮以改变数字轮的代码，从而防止用户改变号码的代码 无意中旋转旋钮时轮子自由。