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公开(公告)号：US11784262B2
公开(公告)日：2023-10-10
申请号：US16945165
申请日：2020-07-31
发明人： Mahito Shinohara
IPC分类号： H01L31/02 , H01L31/115 , H01L31/101 , G01S17/931
CPC分类号： H01L31/02005 , H01L31/101 , H01L31/115 , G01S17/931
摘要： An apparatus includes a first semiconductor region of a first conductivity type configured to collect a signal charge, and a connection region of a second conductivity type configured to feed a predetermined potential to a well including a second semiconductor region of the second conductivity type at a depth to which the connection region extends, a third semiconductor region of the second conductivity type at a position deeper than the connection region and the second semiconductor region, and a fourth semiconductor region between the second semiconductor region and the third semiconductor region, wherein a dopant for use in forming a semiconductor region of the first conductivity type is injected in the fourth semiconductor region, and a main carrier of the fourth semiconductor region is a carrier of the same conductivity type as a majority carrier of a semiconductor region of the second conductivity type.
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公开(公告)号：US11728358B2
公开(公告)日：2023-08-15
申请号：US17476591
申请日：2021-09-16
发明人： Mahito Shinohara , Hiroshi Sekine
IPC分类号： H01L27/146 , H04N25/75 , H04N25/76
CPC分类号： H01L27/14616 , H01L27/1463 , H04N25/75 , H04N25/76
摘要： A photoelectric conversion apparatus comprises a semiconductor layer including a first surface and a second surface, a first semiconductor region of a first conductivity type arranged in the semiconductor layer and configured to accumulate a signal charge generated by incident light, a second semiconductor region of the first conductivity type arranged in the semiconductor layer, a first transfer electrode configured to transfer the signal charge accumulated in the first semiconductor region to the second semiconductor region, a third semiconductor region of a second conductivity type arranged between the second semiconductor region and the second surface, and a fourth semiconductor region of the second conductivity type arranged between the third semiconductor region and the second surface. The third semiconductor region at least partially overlaps, in orthographic projection to the first surface, the second semiconductor region and the fourth semiconductor region.
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公开(公告)号：US20230038959A1
公开(公告)日：2023-02-09
申请号：US17858098
申请日：2022-07-06
发明人： Hiroshi Sekine , Mahito Shinohara
IPC分类号： H01L27/146 , G06T7/55 , H04N5/3745
摘要： A photoelectric conversion device includes a substrate provided with pixels each including a photoelectric converter that accumulates charge generated by an incidence of light, a charge holding portion that holds charge transferred from the photoelectric converter, and an amplifier unit that includes an input node that receives charge transferred from the charge holding portion, a metal film disposed over a side of a first surface of the substrate so as to cover at least the charge holding portion, and a trench structure provided in the substrate on the side of the first surface of the substrate. The photoelectric conversion device is configured such that the light is incident from the side of the first surface of the substrate. The trench structure is disposed between the photoelectric converter and the charge holding portion of a first pixel.
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公开(公告)号：US20200058700A1
公开(公告)日：2020-02-20
申请号：US16506146
申请日：2019-07-09
发明人： Mahito Shinohara
IPC分类号： H01L27/148 , H01L27/146
摘要： A photoelectric conversion device includes a photoelectric converter accumulating signal charge generated by photoelectric conversion in the first semiconductor region of a first conductivity type, a charge-to-voltage converter generating a voltage signal in accordance with amount of the signal charge, a transistor of a second conductivity type provided in a third semiconductor region of the first conductivity type and including a gate connected to the first semiconductor region, and a voltage supply circuit supplying voltage to the source and drain of the transistor. The voltage supply circuit supplies voltage that causes gate capacitance of the transistor to be a first capacitance value when signal charge accumulated in the first semiconductor region correspond to first amount and cause the gate capacitance to be a second capacitance value when signal charge accumulated in the first semiconductor region correspond to second amount.
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公开(公告)号：US20190252432A1
公开(公告)日：2019-08-15
申请号：US16259451
申请日：2019-01-28
发明人： Yusuke Onuki , Mahito Shinohara , Hajime Ikeda , Takafumi Miki , Hiroshi Sekine
IPC分类号： H01L27/146 , H04N5/359 , H04N5/378 , H04N5/369 , H04N5/3745
摘要： An imaging device includes pixels each including a photoelectric converter that generates charges by photoelectric conversion, a first transfer transistor that transfers charges of the photoelectric converter to a first holding portion, a second transfer transistor that transfers charges of the first holding portion to a second holding portion, and an amplifier unit that outputs a signal based on charges held by the second holding portion. The first transfer transistor is configured to form a potential well for the charges between the photoelectric converter and the first holding portion when the first transistor is in an on-state. The maximum charge amount QPD generated by the photoelectric converter during one exposure period, a saturation charge amount QMEM_SAT of the first holding portion, and the maximum charge amount QGS that can be held in the potential well are in a relationship of: QPD
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公开(公告)号：US09142580B2
公开(公告)日：2015-09-22
申请号：US13961045
申请日：2013-08-07
IPC分类号： H01L31/062 , H01L27/146
CPC分类号： H01L27/14612 , H01L27/14603 , H01L27/1461 , H01L27/1463 , H01L27/1464 , H01L27/14645 , H01L27/14689
摘要： An image pickup apparatus includes a pixel portion in which pixels are arranged, the pixels each including a first semiconductor region of first conductivity type having signal charges as majority carriers and a second semiconductor region of second conductivity type having signal charges as minority carriers, the second semiconductor region being contiguous to the first semiconductor region, the first semiconductor region being disposed between a surface of a semiconductor substrate. The pixel portion includes a class I pixel and a class II pixel located near a reference contact. A distance between the surface of the semiconductor substrate and the second semiconductor region of the class I pixel is smaller than a distance between the surface of the semiconductor substrate and the second semiconductor region of the class II pixel.
摘要翻译： 图像拾取装置包括其中排列有像素的像素部分，每个像素包括具有信号电荷作为多数载流子的第一导电类型的第一半导体区域和具有作为少数载流子的信号电荷的第二导电类型的第二半导体区域，第二 半导体区域与第一半导体区域邻接，第一半导体区域设置在半导体衬底的表面之间。 像素部分包括位于参考触点附近的I类像素和II类像素。 半导体衬底的表面与I类像素的第二半导体区之间的距离小于半导体衬底的表面与II类像素的第二半导体区之间的距离。
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7.发明申请IMAGING APPARATUS, IMAGING SYSTEM AND MANUFACTURING METHOD OF IMAGING APPARATUS 有权成像装置，成像系统和成像装置的制造方法公开(公告)号：US20150179699A1
公开(公告)日：2015-06-25
申请号：US14579000
申请日：2014-12-22
发明人： Mahito Shinohara
IPC分类号： H01L27/146
CPC分类号： H01L27/14679 , H01L27/14689
摘要： One embodiment provides an imaging apparatus including a photoelectric conversion unit; and a junction type field effect transistor configured to output a signal based on a carrier generated by the photoelectric conversion unit. The junction type field effect transistor includes a semiconductor region of a first conductivity type that forms a channel and a gate region of a second conductivity type. The semiconductor region of the first conductivity type includes a first region and a second region. The first region and the second region are disposed in this order toward a direction to which a carrier in the channel drifts. An impurity density of the second region is lower than an impurity density of the first region.
摘要翻译： 一个实施例提供了一种包括光电转换单元的成像设备; 以及结型场效应晶体管，被配置为输出基于由所述光电转换单元生成的载波的信号。 结型场效应晶体管包括形成沟道的第一导电类型的半导体区域和第二导电类型的栅极区域。 第一导电类型的半导体区域包括第一区域和第二区域。 第一区域和第二区域按照该通道中的载体漂移的方向依次布置。 第二区域的杂质浓度低于第一区域的杂质浓度。
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公开(公告)号：US12028631B2
公开(公告)日：2024-07-02
申请号：US18341850
申请日：2023-06-27
发明人： Mahito Shinohara
IPC分类号： H04N25/67 , H04N25/671 , H04N25/77
CPC分类号： H04N25/671 , H04N25/77
摘要： A photoelectric conversion apparatus in which a plurality of pixels are arranged is provided. Each of the plurality of pixels includes an avalanche photodiode arranged between a first potential supply line and a second potential supply line, a first transistor arranged so as to form a current path between the first potential supply line and the avalanche photodiode, and a holding circuit configured to, when avalanche breakdown of the avalanche photodiode has occurred, hold a second potential corresponding a first potential of an electrode of the avalanche photodiode connected to the first transistor. The second potential is supplied to a gate of the first transistor from the holding circuit.
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公开(公告)号：US11588995B2
公开(公告)日：2023-02-21
申请号：US16817017
申请日：2020-03-12
发明人： Mahito Shinohara
IPC分类号： H04N5/378 , H01L27/146 , H01L31/02 , H01L31/10 , H04N5/359 , H01L31/107 , H04N5/374
摘要： A photoelectric conversion device includes a photoelectric conversion region, a readout circuit, and a counting circuit. The photoelectric conversion region is configured to generate a signal charge. The readout circuit is configured to, when reading out a signal that is based on the signal charge generated at the photoelectric conversion region, selectively perform first readout for reading out the signal using avalanche multiplication that is based on the signal charge and second readout for reading out the signal without causing avalanche multiplication to occur with respect to at least a part of the signal charge. The counting circuit is configured to count a number of occurrences of avalanche current which is caused to occur by avalanche multiplication in the first readout.
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10.发明授权公开(公告)号：US11503234B2
公开(公告)日：2022-11-15
申请号：US16793082
申请日：2020-02-18
发明人： Mahito Shinohara
IPC分类号： H04N5/363 , H01L27/146
摘要： A photoelectric conversion device includes a photoelectric conversion unit that generates signal charge of a first polarity and a charge conversion circuit that converts the signal charge into a signal voltage. The photoelectric conversion unit includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type that are provided in a surface side of a semiconductor substrate, a third semiconductor region of the first conductivity type provided at a first depth, a fourth semiconductor region of the second conductivity type provided at a second depth and overlaps the second semiconductor region in a plan view, and a fifth semiconductor region of the first conductivity type provided at a third depth, and the third semiconductor region and the fifth semiconductor region overlap the first semiconductor region, the second semiconductor region, and the fourth semiconductor region in the plan view.
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